[PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.

[PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

This patch implement GPIO LIB support for the CPM2 GPIOs.

The code is based on Jochen Friedrich's patch for the CPM1.

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
---
 arch/powerpc/platforms/Kconfig |    2 +
 arch/powerpc/sysdev/cpm2.c     |  123 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 125 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index b0aa0dc..93ec36e 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -283,6 +283,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index 7478e81..f4d72b8 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -33,7 +33,9 @@
 #include <linux/mm.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
+#include <linux/spinlock.h>
 #include <linux/of.h>
+#include <linux/of_gpio.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
@@ -43,6 +45,7 @@
 #include <asm/cpm2.h>
 #include <asm/rheap.h>
 #include <asm/fs_pd.h>
+#include <asm/gpio.h>
 
 #include <sysdev/fsl_soc.h>
 
@@ -474,3 +477,123 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+struct cpm2_gpio32_chip {
+	struct of_mm_gpio_chip mm_gc;
+	spinlock_t lock;
+
+	/* shadowed data register to clear/set bits safely */
+	u32 cpdata;
+};
+
+static inline struct cpm2_gpio32_chip *
+to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+	return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
+}
+
+static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+
+	cpm2_gc->cpdata = in_be32(&iop->dat);
+}
+
+static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	return !!(in_be32(&iop->dat) & pin_mask);
+}
+
+static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	unsigned long flags;
+	u32 pin_mask = 1 << (31 - gpio);
+
+	spin_lock_irqsave(&cpm2_gc->lock, flags);
+
+	if (value)
+		cpm2_gc->cpdata |= pin_mask;
+	else
+		cpm2_gc->cpdata &= ~pin_mask;
+
+	out_be32(&iop->dat, cpm2_gc->cpdata);
+
+	spin_unlock_irqrestore(&cpm2_gc->lock, flags);
+}
+
+static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	setbits32(&iop->dir, pin_mask);
+
+	cpm2_gpio32_set(gc, gpio, val);
+
+	return 0;
+}
+
+static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	clrbits32(&iop->dir, pin_mask);
+
+	return 0;
+}
+
+int cpm2_gpiochip_add32(struct device_node *np)
+{
+	struct cpm2_gpio32_chip *cpm2_gc;
+	struct of_mm_gpio_chip *mm_gc;
+	struct of_gpio_chip *of_gc;
+	struct gpio_chip *gc;
+
+	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
+	if (!cpm2_gc)
+		return -ENOMEM;
+
+	spin_lock_init(&cpm2_gc->lock);
+
+	mm_gc = &cpm2_gc->mm_gc;
+	of_gc = &mm_gc->of_gc;
+	gc = &of_gc->gc;
+
+	mm_gc->save_regs = cpm2_gpio32_save_regs;
+	of_gc->gpio_cells = 1;
+	gc->ngpio = 32;
+	gc->direction_input = cpm2_gpio32_dir_in;
+	gc->direction_output = cpm2_gpio32_dir_out;
+	gc->get = cpm2_gpio32_get;
+	gc->set = cpm2_gpio32_set;
+
+	return of_mm_gpiochip_add(np, mm_gc);
+}
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
-- 
1.5.0


-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

Re: [PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.

[Jochen Friedrich]

Hi Laurent,

> This patch implement GPIO LIB support for the CPM2 GPIOs.
> 
> The code is based on Jochen Friedrich's patch for the CPM1.

I guess most of this should go to cpm_common.c and should be used for
Port E on CPM1, as well. This port uses the same layout as CPM2 while 
Port B uses a different layout. See the discussion in
http://patchwork.ozlabs.org/linuxppc/patch?id=16282

Thanks,
Jochen

Re: [PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 800 bytes --]

On Thursday 17 April 2008 12:13, Jochen Friedrich wrote:
> Hi Laurent,
> 
> > This patch implement GPIO LIB support for the CPM2 GPIOs.
> > 
> > The code is based on Jochen Friedrich's patch for the CPM1.
> 
> I guess most of this should go to cpm_common.c and should be used for
> Port E on CPM1, as well. This port uses the same layout as CPM2 while 
> Port B uses a different layout. See the discussion in
> http://patchwork.ozlabs.org/linuxppc/patch?id=16282

The link doesn't seem to be related.

I'll rework the patch to move CPM2 GPIO support to cpm_common.c. Have you 
thought about a proper name for the compatible property ?

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

Re: [PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.

[Jochen Friedrich]

Hi Laurent,

>> http://patchwork.ozlabs.org/linuxppc/patch?id=16282
> 
> The link doesn't seem to be related.

http://patchwork.ozlabs.org/linuxppc/patch?id=17490 is the correct one. 

> I'll rework the patch to move CPM2 GPIO support to cpm_common.c. Have you 
> thought about a proper name for the compatible property ?

I would leave cpm_init_par_io() in cpm2.c and just move the other parts.
- for cpm2, the property fsl,cpm2-pario-bank is correct.
- for cpm1, i'm thinking of something like fsl,cpm1-pario-bank32b and fsl,cpm1-pario-bank32e.

I'll update the CPM1 parts on top of your patch...

Thanks,
Jochen

Re: [PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 1314 bytes --]

On Thursday 17 April 2008 13:21, Jochen Friedrich wrote:
> Hi Laurent,
> 
> >> http://patchwork.ozlabs.org/linuxppc/patch?id=16282
> > 
> > The link doesn't seem to be related.
> 
> http://patchwork.ozlabs.org/linuxppc/patch?id=17490 is the correct one. 

Thanks.

> > I'll rework the patch to move CPM2 GPIO support to cpm_common.c. Have you 
> > thought about a proper name for the compatible property ?
> 
> I would leave cpm_init_par_io() in cpm2.c and just move the other parts.
> - for cpm2, the property fsl,cpm2-pario-bank is correct.
> - for cpm1, i'm thinking of something like fsl,cpm1-pario-bank32b and 
fsl,cpm1-pario-bank32e.

Any preference for common function names ? cpm2_gpio32* might be too 
CPM2-specific for cpm_common.c. cpm_gpio32* is a bit too generic as it 
doesn't support port E on the CPM1.

BTW, what's the purpose of the shadow data register in the CPM GPIO chip 
structure ? As the set operation is protected by a spinlock, the only use I 
can think of is to prevent changing bits in the PDAT register for pins 
configured as inputs. Is that correct ? If so this should be clearly 
documented in the code.

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

Re: [PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.

[Jochen Friedrich]

Hi Laurent,

> BTW, what's the purpose of the shadow data register in the CPM GPIO chip 
> structure ? As the set operation is protected by a spinlock, the only use I 
> can think of is to prevent changing bits in the PDAT register for pins 
> configured as inputs. Is that correct ? If so this should be clearly 
> documented in the code.

It's for pins configured as open drain. See the discussion in:

http://ozlabs.org/pipermail/linuxppc-dev/2008-January/050826.html

Thanks,
Jochen

Re: [PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.

[Jochen Friedrich]

Hi Laurent,

> Any preference for common function names ? cpm2_gpio32* might be too 
> CPM2-specific for cpm_common.c. cpm_gpio32* is a bit too generic as it 
> doesn't support port E on the CPM1.

I would keep the cpm2 name. I'll just add a comment to cpm1.c that
fsl,cpm1-pario-bank32e uses cpm2 layout.

Thanks,
Jochen