440EPx - SPI and IIC1 conflict

[Gary Jennejohn <garyj@denx.de>]

Hello,

I've developed a driver for the SPI controller in the 440EPx, which should
also work for e.g. the 460EX, and maybe other AMCC processors.

According to the UM bit 14 in SDR0_PFC1 controls whether certain signals
are for IIC1 or SPI.  My driver assures that this bit is set to 0.  Note
that I haven't been able to find any code in the Linux tree which
manipulates this register except for my driver, so IIC1 isn't actually
enabled for the 440EPx or the 460EX.

Anyway.  In order to guarantee that IIC1 doesn't interfere with the
operation of SPI I have this code snippet in i2c-ibm_of.c:

#if (defined(CONFIG_SPI_PPC4xx) || defined(CONFIG_SPI_PPC4xx_MODULE)) \
	&& defined(CONFIG_440EPX)
	/*
	 * Hack, but on the 440EPx we can have either IIC1 or SPI.
	 */
	if (dev->paddr == 0x1ef600800ULL)
		goto fail1;
#endif

which skips IIC1 if the SPI controller is being used.

However, this isn't very aesthetically pleasing.

A colleague suggested testing bit 14 in SDR0_PFC1 and bailing if it's
set.

The problem with this is that the test would depend on the order in which
the init routines are called.  Right now the SPI driver is initialized
before the i2c driver, but I'm not certain that this would be the case for
all time.

Basically I'm wondering whether anyone on this list has any brilliant
idea for handling this problem or whether my present solution is really
just OK.

---
Gary Jennejohn
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