[PATCH] 4xx: Workaround for CHIP_11 Errata

[PATCH] 4xx: Workaround for CHIP_11 Errata

[Josh Boyer]

The PowerPC 440EP, 440GR, 440EPx, and 440GRx chips have an issue that
causes the PLB3-to-PLB4 bridge to wait indefinitely for transaction
requests that cross the end-of-memory-range boundary.  Since the DDR
controller only returns the valid portion of a read request, the bridge
will prevent other PLB masters from completing their transactions.

This implements the recommended workaround for this errata for chips that
use older versions of firmware that do not already handle it.  The last
4KiB of memory are hidden from the kernel to prevent the problem
transactions from occurring.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

---
 arch/powerpc/boot/4xx.c |   21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

--- linux-2.6.orig/arch/powerpc/boot/4xx.c
+++ linux-2.6/arch/powerpc/boot/4xx.c
@@ -21,6 +21,25 @@
 #include "reg.h"
 #include "dcr.h"
 
+static unsigned long chip_11_errata(unsigned long memsize)
+{
+	unsigned long pvr;
+
+	pvr = mfpvr();
+
+	switch (pvr & 0xf0000ff0) {
+		case 0x40000850:
+		case 0x400008d0:
+		case 0x200008d0:
+			memsize -= 4096;
+			break;
+		default:
+			break;
+	}
+
+	return memsize;
+}
+
 /* Read the 4xx SDRAM controller to get size of system memory. */
 void ibm4xx_sdram_fixup_memsize(void)
 {
@@ -34,6 +53,7 @@ void ibm4xx_sdram_fixup_memsize(void)
 			memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
 	}
 
+	memsize = chip_11_errata(memsize);
 	dt_fixup_memory(0, memsize);
 }
 
@@ -199,6 +219,7 @@ void ibm4xx_denali_fixup_memsize(void)
 		bank = 4; /* 4 banks */
 
 	memsize = cs * (1 << (col+row)) * bank * dpath;
+	memsize = chip_11_errata(memsize);
 	dt_fixup_memory(0, memsize);
 }
 

Re: [PATCH] 4xx: Workaround for CHIP_11 Errata

[Stefan Roese]

On Thursday 15 May 2008, Josh Boyer wrote:
> The PowerPC 440EP, 440GR, 440EPx, and 440GRx chips have an issue that
> causes the PLB3-to-PLB4 bridge to wait indefinitely for transaction
> requests that cross the end-of-memory-range boundary.  Since the DDR
> controller only returns the valid portion of a read request, the bridge
> will prevent other PLB masters from completing their transactions.
>
> This implements the recommended workaround for this errata for chips that
> use older versions of firmware that do not already handle it.  The last
> 4KiB of memory are hidden from the kernel to prevent the problem
> transactions from occurring.
>
> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

Acked-by: Stefan Roese <sr@denx.de>

Thanks.

Best regards,
Stefan

Re: [PATCH] 4xx: Workaround for CHIP_11 Errata

[Sean MacLennan]

On Thu, 15 May 2008 09:43:46 -0500
"Josh Boyer" <jwboyer@linux.vnet.ibm.com> wrote:

> This implements the recommended workaround for this errata for chips
> that use older versions of firmware that do not already handle it.
> The last 4KiB of memory are hidden from the kernel to prevent the
> problem transactions from occurring.

Do you know which versions of firmware have this problem?

Cheers,
   Sean

Re: [PATCH] 4xx: Workaround for CHIP_11 Errata

[Josh Boyer]

On Thu, 15 May 2008 16:31:04 -0400
Sean MacLennan <smaclennan@pikatech.com> wrote:

> On Thu, 15 May 2008 09:43:46 -0500
> "Josh Boyer" <jwboyer@linux.vnet.ibm.com> wrote:
> 
> > This implements the recommended workaround for this errata for chips
> > that use older versions of firmware that do not already handle it.
> > The last 4KiB of memory are hidden from the kernel to prevent the
> > problem transactions from occurring.
> 
> Do you know which versions of firmware have this problem?

Any U-Boot older than 1.3.3-rc1.  Not sure about PIBS, but I don't
think the version that is on my Bamboo board has a fix for it.

josh

Re: [PATCH] 4xx: Workaround for CHIP_11 Errata

[Stefan Roese]

On Thursday 15 May 2008, Josh Boyer wrote:
> > "Josh Boyer" <jwboyer@linux.vnet.ibm.com> wrote:
> > > This implements the recommended workaround for this errata for chips
> > > that use older versions of firmware that do not already handle it.
> > > The last 4KiB of memory are hidden from the kernel to prevent the
> > > problem transactions from occurring.
> >
> > Do you know which versions of firmware have this problem?
>
> Any U-Boot older than 1.3.3-rc1.  Not sure about PIBS, but I don't
> think the version that is on my Bamboo board has a fix for it.

PIBS will definitely have this problem too. This errata is quite new on 
440EP/GR.

Best regards,
Stefan