From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from lxorguk.ukuu.org.uk (earthlight.etchedpixels.co.uk [81.2.110.250]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7B6F9DDE08 for ; Wed, 4 Jun 2008 22:02:59 +1000 (EST) Date: Wed, 4 Jun 2008 12:47:14 +0100 From: Alan Cox To: Linus Torvalds Subject: Re: MMIO and gcc re-ordering issue Message-ID: <20080604124714.55dbce65@core> In-Reply-To: References: <1211852026.3286.36.camel@pasglop> <200806041205.45833.nickpiggin@yahoo.com.au> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Cc: Benjamin, Nick Piggin , Russell King , linux-kernel@vger.kernel.org, Trent Piepho , linuxppc-dev@ozlabs.org, linux-arch@vger.kernel.org, scottwood@freescale.com, David Miller List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , > Anyway, Intel certainly seems to document that WC memory is serialized by= =20 > any access to UC memory. I don't believe that is actually true on Pentium Pro at least. > So what started out as a "we can do accesses to the frame buffer more=20 > efficiently without anybody ever even having to know or care" has=20 > turned into a whole nightmare of people using it for other things, and= =20 > then you very much _do_ have to care! ] Notably graphics where 3Dfx lined the registers up specifically to make this work. We were also using it with I=C2=B2O where it gave a small performance gain. Alan