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From: Laurent Pinchart <laurentp@cse-semaphore.com>
To: linuxppc-embedded@ozlabs.org
Cc: John Zhou <johnzhouzj@gmail.com>
Subject: Re: Question on PowerPC's JTAG instruction
Date: Thu, 12 Jun 2008 16:05:26 +0200	[thread overview]
Message-ID: <200806121605.28850.laurentp@cse-semaphore.com> (raw)
In-Reply-To: <966933c00805291814s12439a96q57fabe77ff1139ec@mail.gmail.com>

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Hi John,

On Friday 30 May 2008 03:14, John Zhou wrote:
> Hi,
> 
> We want to design a tool to speed up our hardware diagnostics via JTAG
> port.
> 
> So we have question to ask for your help:
> 
> 1. How do we access PowerPC's internal GPRs and SPRs etc. via JTAG
> instruction?
> 
> We'v gone through IEEE.1149.1.   There are no standard JTAG instruction to
> access CPU's data bus, including internal or external data bus. Do we must
> need private JTAG instruction to access CPU's internal resource?

That's right.

> if it is, could you share the documents with us?

No public documentation is available. You will need to sign an NDA with 
Freescale (and probably pay $$$$).

I had to design a test bench to program the flash memory on our MPC8248-based 
hardware, and ended up using JTAG to bitbang the bus signals. Programming the 
processor through JTAG private instructions would have been faster.

> 2. For 'BSDL' usage, you know, we have many components on one board and much
> more signals are processed specically. So, how to integrate PowerPC's BSDL
> with other components' 'BSDL'?  Could you give us any hints on it? or any
> document is also welcome!
> 
> Your any help is appreciated!

Best regards,

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

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      reply	other threads:[~2008-06-12 14:05 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-05-30  1:14 Question on PowerPC's JTAG instruction John Zhou
2008-06-12 14:05 ` Laurent Pinchart [this message]

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