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From: Laurent Pinchart <laurentp@cse-semaphore.com>
To: linuxppc-embedded@ozlabs.org
Subject: Re: Question on PowerPC's JTAG instruction
Date: Thu, 12 Jun 2008 16:05:26 +0200
References: <966933c00805291814s12439a96q57fabe77ff1139ec@mail.gmail.com>
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Cc: John Zhou <johnzhouzj@gmail.com>
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Hi John,

On Friday 30 May 2008 03:14, John Zhou wrote:
> Hi,
>=20
> We want to design a tool to speed up our hardware diagnostics via JTAG
> port.
>=20
> So we have question to ask for your help:
>=20
> 1. How do we access PowerPC's internal GPRs and SPRs etc. via JTAG
> instruction?
>=20
> We'v gone through IEEE.1149.1.   There are no standard JTAG instruction to
> access CPU's data bus, including internal or external data bus. Do we must
> need private JTAG instruction to access CPU's internal resource?

That's right.

> if it is, could you share the documents with us?

No public documentation is available. You will need to sign an NDA with=20
=46reescale (and probably pay $$$$).

I had to design a test bench to program the flash memory on our MPC8248-bas=
ed=20
hardware, and ended up using JTAG to bitbang the bus signals. Programming t=
he=20
processor through JTAG private instructions would have been faster.

> 2. For 'BSDL' usage, you know, we have many components on one board and m=
uch
> more signals are processed specically. So, how to integrate PowerPC's BSDL
> with other components' 'BSDL'?  Could you give us any hints on it? or any
> document is also welcome!
>=20
> Your any help is appreciated!

Best regards,

=2D-=20
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
=46 +32 (2) 387 42 75

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