linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: Michael Neuling <mikey@neuling.org>
To: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@ozlabs.org
Subject: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
Date: Tue, 24 Jun 2008 20:57:49 +1000	[thread overview]
Message-ID: <20080624105750.0610170295@localhost.localdomain> (raw)
In-Reply-To: <1214305069.538931.136638600960.qpush@coopers>

We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers.  Update all code to use these new macros.

Signed-off-by: Michael Neuling <mikey@neuling.org>
---

 arch/powerpc/kernel/align.c      |    6 ++--
 arch/powerpc/kernel/process.c    |    5 ++-
 arch/powerpc/kernel/ptrace.c     |   14 +++++----
 arch/powerpc/kernel/ptrace32.c   |   14 +++++++--
 arch/powerpc/kernel/softemu8xx.c |    4 +-
 arch/powerpc/math-emu/math.c     |   56 +++++++++++++++++++--------------------
 include/asm-powerpc/ppc_asm.h    |    5 ++-
 include/asm-powerpc/processor.h  |    3 ++
 8 files changed, 61 insertions(+), 46 deletions(-)

Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c
@@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re
 static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr,
 			   unsigned int reg, unsigned int flags)
 {
-	char *ptr = (char *) &current->thread.fpr[reg];
+	char *ptr = (char *) &current->thread.TS_FPR(reg);
 	int i, ret;
 
 	if (!(flags & F))
@@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs)
 				return -EFAULT;
 		}
 	} else if (flags & F) {
-		data.dd = current->thread.fpr[reg];
+		data.dd = current->thread.TS_FPR(reg);
 		if (flags & S) {
 			/* Single-precision FP store requires conversion... */
 #ifdef CONFIG_PPC_FPU
@@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs)
 		if (unlikely(ret))
 			return -EFAULT;
 	} else if (flags & F)
-		current->thread.fpr[reg] = data.dd;
+		current->thread.TS_FPR(reg) = data.dd;
 	else
 		regs->gpr[reg] = data.ll;
 
Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c
@@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts
 		return 0;
 	flush_fp_to_thread(current);
 
-	memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs));
+	memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs));
 
 	return 1;
 }
@@ -689,7 +689,8 @@ void start_thread(struct pt_regs *regs, 
 #endif
 
 	discard_lazy_cpu_state();
-	memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
+	memset(current->thread.fpr, 0,
+	       sizeof(current->thread.fpr));
 	current->thread.fpscr.val = 0;
 #ifdef CONFIG_ALTIVEC
 	memset(current->thread.vr, 0, sizeof(current->thread.vr));
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
@@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t
 	flush_fp_to_thread(target);
 
 	BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-		     offsetof(struct thread_struct, fpr[32]));
+		     offsetof(struct thread_struct, TS_FPR(32)));
 
 	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
-				   &target->thread.fpr, 0, -1);
+				   target->thread.fpr, 0, -1);
 }
 
 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
@@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t
 	flush_fp_to_thread(target);
 
 	BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-		     offsetof(struct thread_struct, fpr[32]));
+		     offsetof(struct thread_struct, TS_FPR(32)));
 
 	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
-				  &target->thread.fpr, 0, -1);
+				  target->thread.fpr, 0, -1);
 }
 
 
@@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi
 			tmp = ptrace_get_reg(child, (int) index);
 		} else {
 			flush_fp_to_thread(child);
-			tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0];
+			tmp = ((unsigned long *)child->thread.fpr)
+				[TS_FPRSPACING * (index - PT_FPR0)];
 		}
 		ret = put_user(tmp,(unsigned long __user *) data);
 		break;
@@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi
 			ret = ptrace_put_reg(child, index, data);
 		} else {
 			flush_fp_to_thread(child);
-			((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data;
+			((unsigned long *)child->thread.fpr)
+				[TS_FPRSPACING * (index - PT_FPR0)] = data;
 			ret = 0;
 		}
 		break;
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace32.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
@@ -64,6 +64,11 @@ static long compat_ptrace_old(struct tas
 	return -EPERM;
 }
 
+/* Macros to workout the correct index for the FPR in the thread struct */
+#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1)
+#define FPRHALF(i) (((i) - PT_FPR0) % 2)
+#define FPRINDEX(i) TS_FPRSPACING * FPRNUMBER(i) + FPRHALF(i)
+
 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
 			compat_ulong_t caddr, compat_ulong_t cdata)
 {
@@ -122,7 +127,8 @@ long compat_arch_ptrace(struct task_stru
 			 * to be an array of unsigned int (32 bits) - the
 			 * index passed in is based on this assumption.
 			 */
-			tmp = ((unsigned int *)child->thread.fpr)[index - PT_FPR0];
+			tmp = ((unsigned int *)child->thread.fpr)
+				[FPRINDEX(index)];
 		}
 		ret = put_user((unsigned int)tmp, (u32 __user *)data);
 		break;
@@ -162,7 +168,8 @@ long compat_arch_ptrace(struct task_stru
 		CHECK_FULL_REGS(child->thread.regs);
 		if (numReg >= PT_FPR0) {
 			flush_fp_to_thread(child);
-			tmp = ((unsigned long int *)child->thread.fpr)[numReg - PT_FPR0];
+			tmp = ((unsigned long int *)child->thread.fpr)
+				[FPRINDEX(numReg)];
 		} else { /* register within PT_REGS struct */
 			tmp = ptrace_get_reg(child, numReg);
 		} 
@@ -217,7 +224,8 @@ long compat_arch_ptrace(struct task_stru
 			 * to be an array of unsigned int (32 bits) - the
 			 * index passed in is based on this assumption.
 			 */
-			((unsigned int *)child->thread.fpr)[index - PT_FPR0] = data;
+			((unsigned int *)child->thread.fpr)
+				[TS_FPRSPACING * (index - PT_FPR0)] = data;
 			ret = 0;
 		}
 		break;
Index: linux-2.6-ozlabs/arch/powerpc/kernel/softemu8xx.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/softemu8xx.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/softemu8xx.c
@@ -124,7 +124,7 @@ int Soft_emulate_8xx(struct pt_regs *reg
 	disp = instword & 0xffff;
 
 	ea = (u32 *)(regs->gpr[idxreg] + disp);
-	ip = (u32 *)&current->thread.fpr[flreg];
+	ip = (u32 *)&current->thread.TS_FPR(flreg);
 
 	switch ( inst )
 	{
@@ -168,7 +168,7 @@ int Soft_emulate_8xx(struct pt_regs *reg
 		break;
 	case FMR:
 		/* assume this is a fp move -- Cort */
-		memcpy(ip, &current->thread.fpr[(instword>>11)&0x1f],
+		memcpy(ip, &current->thread.TS_FPR((instword>>11)&0x1f),
 		       sizeof(double));
 		break;
 	default:
Index: linux-2.6-ozlabs/arch/powerpc/math-emu/math.c
===================================================================
--- linux-2.6-ozlabs.orig/arch/powerpc/math-emu/math.c
+++ linux-2.6-ozlabs/arch/powerpc/math-emu/math.c
@@ -230,14 +230,14 @@ do_mathemu(struct pt_regs *regs)
 	case LFD:
 		idx = (insn >> 16) & 0x1f;
 		sdisp = (insn & 0xffff);
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
 		lfd(op0, op1, op2, op3);
 		break;
 	case LFDU:
 		idx = (insn >> 16) & 0x1f;
 		sdisp = (insn & 0xffff);
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
 		lfd(op0, op1, op2, op3);
 		regs->gpr[idx] = (unsigned long)op1;
@@ -245,21 +245,21 @@ do_mathemu(struct pt_regs *regs)
 	case STFD:
 		idx = (insn >> 16) & 0x1f;
 		sdisp = (insn & 0xffff);
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
 		stfd(op0, op1, op2, op3);
 		break;
 	case STFDU:
 		idx = (insn >> 16) & 0x1f;
 		sdisp = (insn & 0xffff);
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
 		stfd(op0, op1, op2, op3);
 		regs->gpr[idx] = (unsigned long)op1;
 		break;
 	case OP63:
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
-		op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+		op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 		fmr(op0, op1, op2, op3);
 		break;
 	default:
@@ -356,28 +356,28 @@ do_mathemu(struct pt_regs *regs)
 
 	switch (type) {
 	case AB:
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
-		op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
-		op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+		op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
+		op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 		break;
 
 	case AC:
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
-		op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
-		op2 = (void *)&current->thread.fpr[(insn >>  6) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+		op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
+		op2 = (void *)&current->thread.TS_FPR((insn >>  6) & 0x1f);
 		break;
 
 	case ABC:
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
-		op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
-		op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
-		op3 = (void *)&current->thread.fpr[(insn >>  6) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+		op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
+		op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
+		op3 = (void *)&current->thread.TS_FPR((insn >>  6) & 0x1f);
 		break;
 
 	case D:
 		idx = (insn >> 16) & 0x1f;
 		sdisp = (insn & 0xffff);
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
 		break;
 
@@ -387,27 +387,27 @@ do_mathemu(struct pt_regs *regs)
 			goto illegal;
 
 		sdisp = (insn & 0xffff);
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 		op1 = (void *)(regs->gpr[idx] + sdisp);
 		break;
 
 	case X:
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 		break;
 
 	case XA:
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
-		op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+		op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
 		break;
 
 	case XB:
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
-		op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+		op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 		break;
 
 	case XE:
 		idx = (insn >> 16) & 0x1f;
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 		if (!idx) {
 			if (((insn >> 1) & 0x3ff) == STFIWX)
 				op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]);
@@ -421,7 +421,7 @@ do_mathemu(struct pt_regs *regs)
 
 	case XEU:
 		idx = (insn >> 16) & 0x1f;
-		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+		op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 		op1 = (void *)((idx ? regs->gpr[idx] : 0)
 				+ regs->gpr[(insn >> 11) & 0x1f]);
 		break;
@@ -429,8 +429,8 @@ do_mathemu(struct pt_regs *regs)
 	case XCR:
 		op0 = (void *)&regs->ccr;
 		op1 = (void *)((insn >> 23) & 0x7);
-		op2 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
-		op3 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+		op2 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
+		op3 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 		break;
 
 	case XCRL:
@@ -450,7 +450,7 @@ do_mathemu(struct pt_regs *regs)
 
 	case XFLB:
 		op0 = (void *)((insn >> 17) & 0xff);
-		op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+		op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 		break;
 
 	default:
Index: linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h
===================================================================
--- linux-2.6-ozlabs.orig/include/asm-powerpc/ppc_asm.h
+++ linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h
@@ -6,6 +6,7 @@
 
 #include <linux/stringify.h>
 #include <asm/asm-compat.h>
+#include <asm/processor.h>
 
 #ifndef __ASSEMBLY__
 #error __FILE__ should only be used in assembler files
@@ -83,13 +84,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR);				
 #define REST_8GPRS(n, base)	REST_4GPRS(n, base); REST_4GPRS(n+4, base)
 #define REST_10GPRS(n, base)	REST_8GPRS(n, base); REST_2GPRS(n+8, base)
 
-#define SAVE_FPR(n, base)	stfd	n,THREAD_FPR0+8*(n)(base)
+#define SAVE_FPR(n, base)	stfd	n,THREAD_FPR0+8*TS_FPRSPACING*(n)(base)
 #define SAVE_2FPRS(n, base)	SAVE_FPR(n, base); SAVE_FPR(n+1, base)
 #define SAVE_4FPRS(n, base)	SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
 #define SAVE_8FPRS(n, base)	SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
 #define SAVE_16FPRS(n, base)	SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
 #define SAVE_32FPRS(n, base)	SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
-#define REST_FPR(n, base)	lfd	n,THREAD_FPR0+8*(n)(base)
+#define REST_FPR(n, base)	lfd	n,THREAD_FPR0+8*TS_FPRSPACING*(n)(base)
 #define REST_2FPRS(n, base)	REST_FPR(n, base); REST_FPR(n+1, base)
 #define REST_4FPRS(n, base)	REST_2FPRS(n, base); REST_2FPRS(n+2, base)
 #define REST_8FPRS(n, base)	REST_4FPRS(n, base); REST_4FPRS(n+4, base)
Index: linux-2.6-ozlabs/include/asm-powerpc/processor.h
===================================================================
--- linux-2.6-ozlabs.orig/include/asm-powerpc/processor.h
+++ linux-2.6-ozlabs/include/asm-powerpc/processor.h
@@ -136,6 +136,8 @@ typedef struct {
 	unsigned long seg;
 } mm_segment_t;
 
+#define TS_FPR(i) fpr[i]
+
 struct thread_struct {
 	unsigned long	ksp;		/* Kernel stack pointer */
 	unsigned long	ksp_limit;	/* if ksp <= ksp_limit stack overflow */
@@ -289,4 +291,5 @@ static inline void prefetchw(const void 
 
 #endif /* __KERNEL__ */
 #endif /* __ASSEMBLY__ */
+#define TS_FPRSPACING 1
 #endif /* _ASM_POWERPC_PROCESSOR_H */

  parent reply	other threads:[~2008-06-24 10:57 UTC|newest]

Thread overview: 106+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-06-18  0:47 [PATCH 0/9] powerpc: Add kernel support for POWER7 VSX Michael Neuling
2008-06-18  0:47 ` [PATCH 3/9] powerpc: Move altivec_unavailable Michael Neuling
2008-06-18  0:47 ` [PATCH 5/9] powerpc: Introduce VSX thread_struct and CONFIG_VSX Michael Neuling
2008-06-18 19:35   ` Kumar Gala
2008-06-18 22:58     ` Paul Mackerras
2008-06-19  4:13       ` Kumar Gala
2008-06-19  4:30         ` Michael Neuling
2008-06-19  4:22   ` Kumar Gala
2008-06-19  4:35     ` Michael Neuling
2008-06-19  4:58       ` Kumar Gala
2008-06-19  5:37         ` Michael Neuling
2008-06-19  5:47           ` Kumar Gala
2008-06-19  6:01             ` Michael Neuling
2008-06-19  6:10               ` Kumar Gala
2008-06-19  9:33                 ` Benjamin Herrenschmidt
2008-06-19 13:24                   ` Kumar Gala
2008-06-18  0:47 ` [PATCH 1/9] powerpc: Fix msr setting in 32 bit signal code Michael Neuling
2008-06-18 14:53   ` Kumar Gala
2008-06-18 23:55     ` Michael Neuling
2008-06-18  0:47 ` [PATCH 4/9] powerpc: Make load_up_fpu and load_up_altivec callable Michael Neuling
2008-06-18  0:47 ` [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct Michael Neuling
2008-06-18  0:47 ` [PATCH 8/9] powerpc: Add VSX context save/restore, ptrace and signal support Michael Neuling
2008-06-18  0:47 ` [PATCH 9/9] powerpc: Add CONFIG_VSX config option Michael Neuling
2008-06-18  0:47 ` [PATCH 7/9] powerpc: Add VSX assembler code macros Michael Neuling
2008-06-18  0:47 ` [PATCH 6/9] powerpc: Add VSX CPU feature Michael Neuling
2008-06-18 16:28   ` Joel Schopp
2008-06-19  6:51   ` David Woodhouse
2008-06-19  7:00     ` Michael Neuling
2008-06-18 13:05 ` [PATCH 0/9] powerpc: Add kernel support for POWER7 VSX Kumar Gala
2008-06-18 23:54   ` Michael Neuling
2008-06-20  4:13 ` Michael Neuling
2008-06-20  4:13   ` [PATCH 8/9] powerpc: Add VSX context save/restore, ptrace and signal support Michael Neuling
2008-06-20  4:13   ` [PATCH 4/9] powerpc: Make load_up_fpu and load_up_altivec callable Michael Neuling
2008-06-20  4:13   ` [PATCH 3/9] powerpc: Move altivec_unavailable Michael Neuling
2008-06-20  4:13   ` [PATCH 6/9] powerpc: Add VSX CPU feature Michael Neuling
2008-06-20  4:13   ` [PATCH 5/9] powerpc: Introduce VSX thread_struct and CONFIG_VSX Michael Neuling
2008-06-20  6:44     ` Kumar Gala
2008-06-20  4:13   ` [PATCH 1/9] powerpc: Fix msr setting in 32 bit signal code Michael Neuling
2008-06-20  6:35     ` Kumar Gala
2008-06-20  4:13   ` [PATCH 7/9] powerpc: Add VSX assembler code macros Michael Neuling
2008-06-20  4:13   ` [PATCH 9/9] powerpc: Add CONFIG_VSX config option Michael Neuling
2008-06-20  4:13   ` [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct Michael Neuling
2008-06-20  6:39     ` Kumar Gala
2008-06-22 11:29       ` Michael Neuling
2008-06-20  6:37   ` [PATCH 0/9] powerpc: Add kernel support for POWER7 VSX Kumar Gala
2008-06-20  8:15     ` Michael Neuling
2008-06-23  5:31   ` Michael Neuling
2008-06-23  5:31     ` [PATCH 1/9] powerpc: Fix msr setting in 32 bit signal code Michael Neuling
2008-06-23  5:31     ` [PATCH 3/9] powerpc: Move altivec_unavailable Michael Neuling
2008-06-23  5:31     ` [PATCH 4/9] powerpc: Make load_up_fpu and load_up_altivec callable Michael Neuling
2008-06-23  5:31     ` [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct Michael Neuling
2008-06-23  5:31     ` [PATCH 9/9] powerpc: Add CONFIG_VSX config option Michael Neuling
2008-06-23  5:31     ` [PATCH 5/9] powerpc: Introduce VSX thread_struct and CONFIG_VSX Michael Neuling
2008-06-23  5:31     ` [PATCH 7/9] powerpc: Add VSX assembler code macros Michael Neuling
2008-06-23  5:31     ` [PATCH 6/9] powerpc: Add VSX CPU feature Michael Neuling
2008-06-23  5:31     ` [PATCH 8/9] powerpc: Add VSX context save/restore, ptrace and signal support Michael Neuling
2008-06-23  7:38     ` [PATCH 0/9] powerpc: Add kernel support for POWER7 VSX Michael Neuling
2008-06-23  7:38       ` [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct Michael Neuling
2008-06-23  7:38       ` [PATCH 1/9] powerpc: Fix msr setting in 32 bit signal code Michael Neuling
2008-06-23 14:46         ` Kumar Gala
2008-06-23  7:38       ` [PATCH 6/9] powerpc: Add VSX CPU feature Michael Neuling
2008-06-23  7:38       ` [PATCH 8/9] powerpc: Add VSX context save/restore, ptrace and signal support Michael Neuling
2008-06-23  7:38       ` [PATCH 9/9] powerpc: Add CONFIG_VSX config option Michael Neuling
2008-06-23  7:38       ` [PATCH 5/9] powerpc: Introduce VSX thread_struct and CONFIG_VSX Michael Neuling
2008-06-23  7:38       ` [PATCH 3/9] powerpc: Move altivec_unavailable Michael Neuling
2008-06-23  7:38       ` [PATCH 7/9] powerpc: Add VSX assembler code macros Michael Neuling
2008-06-23  7:38       ` [PATCH 4/9] powerpc: Make load_up_fpu and load_up_altivec callable Michael Neuling
2008-06-24 10:57       ` [PATCH 0/9] powerpc: Add kernel support for POWER7 VSX Michael Neuling
2008-06-24 10:57         ` [PATCH 1/9] powerpc: Fix msr setting in 32 bit signal code Michael Neuling
2008-06-24 13:47           ` Kumar Gala
2008-06-24 10:57         ` Michael Neuling [this message]
2008-06-24 14:07           ` [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct Kumar Gala
2008-06-24 16:33             ` Segher Boessenkool
2008-06-25  0:25             ` Michael Neuling
2008-06-24 10:57         ` [PATCH 3/9] powerpc: Move altivec_unavailable Michael Neuling
2008-06-24 10:57         ` [PATCH 4/9] powerpc: Make load_up_fpu and load_up_altivec callable Michael Neuling
2008-06-24 14:01           ` Kumar Gala
2008-06-24 10:57         ` [PATCH 8/9] powerpc: Add VSX context save/restore, ptrace and signal support Michael Neuling
2008-06-24 10:57         ` [PATCH 9/9] powerpc: Add CONFIG_VSX config option Michael Neuling
2008-06-24 14:19           ` Kumar Gala
2008-06-24 10:57         ` [PATCH 5/9] powerpc: Introduce VSX thread_struct and CONFIG_VSX Michael Neuling
2008-06-24 10:57         ` [PATCH 6/9] powerpc: Add VSX CPU feature Michael Neuling
2008-06-24 14:19           ` Kumar Gala
2008-06-24 10:57         ` [PATCH 7/9] powerpc: Add VSX assembler code macros Michael Neuling
2008-06-24 14:06           ` Kumar Gala
2008-06-25  0:06             ` Michael Neuling
2008-06-25  2:19               ` Kumar Gala
2008-06-25  4:07         ` [PATCH 0/9] powerpc: Add kernel support for POWER7 VSX Michael Neuling
2008-06-25  4:07           ` [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct Michael Neuling
2008-06-25 14:08             ` Kumar Gala
2008-06-25 15:34               ` Scott Wood
2008-06-25 16:12                 ` Gabriel Paubert
2008-06-25 16:17                   ` Scott Wood
2008-06-25 17:07                     ` Kumar Gala
2008-06-26  0:09                       ` Michael Neuling
2008-06-26  7:07                         ` [PATCH] " Michael Neuling
2008-06-26 10:44                     ` [PATCH 2/9] " Gabriel Paubert
2008-06-25 17:08                   ` Andreas Schwab
2008-06-25  4:07           ` [PATCH 1/9] powerpc: Fix msr setting in 32 bit signal code Michael Neuling
2008-06-25  4:07           ` [PATCH 5/9] powerpc: Introduce VSX thread_struct and CONFIG_VSX Michael Neuling
2008-06-25  4:07           ` [PATCH 8/9] powerpc: Add VSX context save/restore, ptrace and signal support Michael Neuling
2008-06-25  4:07           ` [PATCH 4/9] powerpc: Make load_up_fpu and load_up_altivec callable Michael Neuling
2008-06-25  4:07           ` [PATCH 7/9] powerpc: Add VSX assembler code macros Michael Neuling
2008-06-25  4:07           ` [PATCH 9/9] powerpc: Add CONFIG_VSX config option Michael Neuling
2008-06-25  4:07           ` [PATCH 3/9] powerpc: Move altivec_unavailable Michael Neuling
2008-06-25  4:07           ` [PATCH 6/9] powerpc: Add VSX CPU feature Michael Neuling

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20080624105750.0610170295@localhost.localdomain \
    --to=mikey@neuling.org \
    --cc=linuxppc-dev@ozlabs.org \
    --cc=paulus@samba.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).