[PATCH] [POWERPC] Xilinx: add compatibility for IBM coreconnect busses.

[PATCH] [POWERPC] Xilinx: add compatibility for IBM coreconnect busses.

[Stephen Neuendorffer]

The IBM coreconnect names are pretty well defined, it appears.  In
addition, the Xilinx versions of these IPs seem to be proliferating.
Hence, in the future let's prefer to use the standard names.  I've
left the old names in for some backward compatibility for existing
device trees.

Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
---
 arch/powerpc/platforms/40x/virtex.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c
index 6c72994..7e1c0e3 100644
--- a/arch/powerpc/platforms/40x/virtex.c
+++ b/arch/powerpc/platforms/40x/virtex.c
@@ -16,11 +16,15 @@
 #include <asm/xilinx_intc.h>
 
 static struct of_device_id xilinx_of_bus_ids[] __initdata = {
+	{ .compatible = "ibm,plb3", },
+	{ .compatible = "ibm,plb4", },
 	{ .compatible = "xlnx,plb-v46-1.00.a", },
 	{ .compatible = "xlnx,plb-v46-1.02.a", },
 	{ .compatible = "xlnx,plb-v34-1.01.a", },
 	{ .compatible = "xlnx,plb-v34-1.02.a", },
+	{ .compatible = "ibm,opb", },
 	{ .compatible = "xlnx,opb-v20-1.10.c", },
+	{ .compatible = "ibm,dcr", },
 	{ .compatible = "xlnx,dcr-v29-1.00.a", },
 	{ .compatible = "xlnx,compound", },
 	{}
-- 
1.5.3.4

Re: [PATCH] [POWERPC] Xilinx: add compatibility for IBM coreconnect busses.

[Grant Likely]

On Wed, May 7, 2008 at 2:47 PM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
> The IBM coreconnect names are pretty well defined, it appears.  In
>  addition, the Xilinx versions of these IPs seem to be proliferating.
>  Hence, in the future let's prefer to use the standard names.  I've
>  left the old names in for some backward compatibility for existing
>  device trees.
>
>  Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>

Acked-by: Grant Likely <grant.likey@secretlab.ca>

I think we can probably give it a release or two and then drop the
older stuff in the list.  Virtex support is still very new, so it is
unlikely that there are many (any?) users out there that won't be
keeping up to date with the xilinx device tree changes.

Cheers,
g.

>  ---
>   arch/powerpc/platforms/40x/virtex.c |    4 ++++
>   1 files changed, 4 insertions(+), 0 deletions(-)
>
>  diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c
>  index 6c72994..7e1c0e3 100644
>  --- a/arch/powerpc/platforms/40x/virtex.c
>  +++ b/arch/powerpc/platforms/40x/virtex.c
>  @@ -16,11 +16,15 @@
>   #include <asm/xilinx_intc.h>
>
>   static struct of_device_id xilinx_of_bus_ids[] __initdata = {
>  +       { .compatible = "ibm,plb3", },
>  +       { .compatible = "ibm,plb4", },
>         { .compatible = "xlnx,plb-v46-1.00.a", },
>         { .compatible = "xlnx,plb-v46-1.02.a", },
>         { .compatible = "xlnx,plb-v34-1.01.a", },
>         { .compatible = "xlnx,plb-v34-1.02.a", },
>  +       { .compatible = "ibm,opb", },
>         { .compatible = "xlnx,opb-v20-1.10.c", },
>  +       { .compatible = "ibm,dcr", },
>         { .compatible = "xlnx,dcr-v29-1.00.a", },
>         { .compatible = "xlnx,compound", },
>         {}
>  --
>  1.5.3.4
>
>
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

RE: [PATCH] [POWERPC] Xilinx: add compatibility for IBM coreconnect busses.

[Stephen Neuendorffer]

Agreed...  I intend the backward compatibility to be a temporary thing.
I'd rip it out now, but since we pull out all the information from the
device tree, this will result in 'it doesn't do anything', and I don't
want to be that mean. :)

Steve

> -----Original Message-----
> From: glikely@secretlab.ca [mailto:glikely@secretlab.ca] On Behalf Of
Grant Likely
> Sent: Wednesday, May 07, 2008 3:33 PM
> To: Stephen Neuendorffer
> Cc: linuxppc-dev@ozlabs.org
> Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for IBM
coreconnect busses.
>=20
> On Wed, May 7, 2008 at 2:47 PM, Stephen Neuendorffer
> <stephen.neuendorffer@xilinx.com> wrote:
> > The IBM coreconnect names are pretty well defined, it appears.  In
> >  addition, the Xilinx versions of these IPs seem to be
proliferating.
> >  Hence, in the future let's prefer to use the standard names.  I've
> >  left the old names in for some backward compatibility for existing
> >  device trees.
> >
> >  Signed-off-by: Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com>
>=20
> Acked-by: Grant Likely <grant.likey@secretlab.ca>
>=20
> I think we can probably give it a release or two and then drop the
> older stuff in the list.  Virtex support is still very new, so it is
> unlikely that there are many (any?) users out there that won't be
> keeping up to date with the xilinx device tree changes.
>=20
> Cheers,
> g.
>=20
> >  ---
> >   arch/powerpc/platforms/40x/virtex.c |    4 ++++
> >   1 files changed, 4 insertions(+), 0 deletions(-)
> >
> >  diff --git a/arch/powerpc/platforms/40x/virtex.c
b/arch/powerpc/platforms/40x/virtex.c
> >  index 6c72994..7e1c0e3 100644
> >  --- a/arch/powerpc/platforms/40x/virtex.c
> >  +++ b/arch/powerpc/platforms/40x/virtex.c
> >  @@ -16,11 +16,15 @@
> >   #include <asm/xilinx_intc.h>
> >
> >   static struct of_device_id xilinx_of_bus_ids[] __initdata =3D {
> >  +       { .compatible =3D "ibm,plb3", },
> >  +       { .compatible =3D "ibm,plb4", },
> >         { .compatible =3D "xlnx,plb-v46-1.00.a", },
> >         { .compatible =3D "xlnx,plb-v46-1.02.a", },
> >         { .compatible =3D "xlnx,plb-v34-1.01.a", },
> >         { .compatible =3D "xlnx,plb-v34-1.02.a", },
> >  +       { .compatible =3D "ibm,opb", },
> >         { .compatible =3D "xlnx,opb-v20-1.10.c", },
> >  +       { .compatible =3D "ibm,dcr", },
> >         { .compatible =3D "xlnx,dcr-v29-1.00.a", },
> >         { .compatible =3D "xlnx,compound", },
> >         {}
> >  --
> >  1.5.3.4
> >
> >
> >
> >
>=20
>=20
>=20
> --
> Grant Likely, B.Sc., P.Eng.
> Secret Lab Technologies Ltd.

Re: [PATCH] [POWERPC] Xilinx: add compatibility for IBM coreconnect busses.

[David Gibson]

On Wed, May 07, 2008 at 01:47:31PM -0700, Stephen Neuendorffer wrote:
> The IBM coreconnect names are pretty well defined, it appears.  In
> addition, the Xilinx versions of these IPs seem to be proliferating.
> Hence, in the future let's prefer to use the standard names.  I've
> left the old names in for some backward compatibility for existing
> device trees.
> 
> Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>

If you're talking about future trees, can't you just slap "simple-bus"
on them avoid this monster id table?

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

Re: [PATCH] [POWERPC] Xilinx: add compatibility for IBM coreconnect busses.

[Josh Boyer]

On Thu, 8 May 2008 10:18:50 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:

> On Wed, May 07, 2008 at 01:47:31PM -0700, Stephen Neuendorffer wrote:
> > The IBM coreconnect names are pretty well defined, it appears.  In
> > addition, the Xilinx versions of these IPs seem to be proliferating.
> > Hence, in the future let's prefer to use the standard names.  I've
> > left the old names in for some backward compatibility for existing
> > device trees.
> > 
> > Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
> 
> If you're talking about future trees, can't you just slap "simple-bus"
> on them avoid this monster id table?

What is that and how does it work?

josh

Re: [PATCH] [POWERPC] Xilinx: add compatibility for IBM coreconnect busses.

[David Gibson]

On Wed, May 07, 2008 at 09:46:30PM -0500, Josh Boyer wrote:
> On Thu, 8 May 2008 10:18:50 +1000
> David Gibson <david@gibson.dropbear.id.au> wrote:
> 
> > On Wed, May 07, 2008 at 01:47:31PM -0700, Stephen Neuendorffer wrote:
> > > The IBM coreconnect names are pretty well defined, it appears.  In
> > > addition, the Xilinx versions of these IPs seem to be proliferating.
> > > Hence, in the future let's prefer to use the standard names.  I've
> > > left the old names in for some backward compatibility for existing
> > > device trees.
> > > 
> > > Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
> > 
> > If you're talking about future trees, can't you just slap "simple-bus"
> > on them avoid this monster id table?
> 
> What is that and how does it work?

ePAPR states that busses which cannot be probed as such (i.e. the
device tree is the only way to figure out what's on the bus) should
have "simple-bus" in their compatible property.  You can then just add
simple-bus to the of_bus_ids list and avoid adding umpteen other things.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

Re: [PATCH] [POWERPC] Xilinx: add compatibility for IBM coreconnect busses.

[Josh Boyer]

On Thu, 8 May 2008 13:30:06 +1000
David Gibson <dwg@au1.ibm.com> wrote:

> On Wed, May 07, 2008 at 09:46:30PM -0500, Josh Boyer wrote:
> > On Thu, 8 May 2008 10:18:50 +1000
> > David Gibson <david@gibson.dropbear.id.au> wrote:
> > 
> > > On Wed, May 07, 2008 at 01:47:31PM -0700, Stephen Neuendorffer wrote:
> > > > The IBM coreconnect names are pretty well defined, it appears.  In
> > > > addition, the Xilinx versions of these IPs seem to be proliferating.
> > > > Hence, in the future let's prefer to use the standard names.  I've
> > > > left the old names in for some backward compatibility for existing
> > > > device trees.
> > > > 
> > > > Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
> > > 
> > > If you're talking about future trees, can't you just slap "simple-bus"
> > > on them avoid this monster id table?
> > 
> > What is that and how does it work?
> 
> ePAPR states that busses which cannot be probed as such (i.e. the
> device tree is the only way to figure out what's on the bus) should
> have "simple-bus" in their compatible property.  You can then just add
> simple-bus to the of_bus_ids list and avoid adding umpteen other things.

Hm.  Hopefully ePAPR will be released soon.

josh

RE: [PATCH] [POWERPC] Xilinx: add compatibility for IBMcoreconnect busses.

[Stephen Neuendorffer]

Hmm... sounds reasonable to me.

> -----Original Message-----
> From: =
linuxppc-dev-bounces+stephen.neuendorffer=3Dxilinx.com@ozlabs.org
[mailto:linuxppc-dev-
> bounces+stephen.neuendorffer=3Dxilinx.com@ozlabs.org] On Behalf Of =
David
Gibson
> Sent: Wednesday, May 07, 2008 8:30 PM
> To: Josh Boyer
> Cc: linuxppc-dev@ozlabs.org
> Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for
IBMcoreconnect busses.
>=20
> On Wed, May 07, 2008 at 09:46:30PM -0500, Josh Boyer wrote:
> > On Thu, 8 May 2008 10:18:50 +1000
> > David Gibson <david@gibson.dropbear.id.au> wrote:
> >
> > > On Wed, May 07, 2008 at 01:47:31PM -0700, Stephen Neuendorffer
wrote:
> > > > The IBM coreconnect names are pretty well defined, it appears.
In
> > > > addition, the Xilinx versions of these IPs seem to be
proliferating.
> > > > Hence, in the future let's prefer to use the standard names.
I've
> > > > left the old names in for some backward compatibility for
existing
> > > > device trees.
> > > >
> > > > Signed-off-by: Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com>
> > >
> > > If you're talking about future trees, can't you just slap
"simple-bus"
> > > on them avoid this monster id table?
> >
> > What is that and how does it work?
>=20
> ePAPR states that busses which cannot be probed as such (i.e. the
> device tree is the only way to figure out what's on the bus) should
> have "simple-bus" in their compatible property.  You can then just add
> simple-bus to the of_bus_ids list and avoid adding umpteen other
things.
>=20
> --
> David Gibson			| I'll have my music baroque, and my
code
> david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT
_the_ _other_
> 				| _way_ _around_!
> http://www.ozlabs.org/~dgibson
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

[PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Stephen Neuendorffer]

ePAPR drafts propose 'simple-bus' as a generic compatibility type for
busses which cannot be probed for devices.  In addition, the Xilinx
versions of these IPs seem to be proliferating.  Hence, in the future
let's prefer to use the standard names.  I've left the old names in
for short term backward compatibility for existing device trees.

Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
---
 arch/powerpc/platforms/40x/virtex.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c
index 6c72994..b1ab7b8 100644
--- a/arch/powerpc/platforms/40x/virtex.c
+++ b/arch/powerpc/platforms/40x/virtex.c
@@ -16,6 +16,7 @@
 #include <asm/xilinx_intc.h>
 
 static struct of_device_id xilinx_of_bus_ids[] __initdata = {
+	{ .compatible = "simple-bus", },
 	{ .compatible = "xlnx,plb-v46-1.00.a", },
 	{ .compatible = "xlnx,plb-v46-1.02.a", },
 	{ .compatible = "xlnx,plb-v34-1.01.a", },
-- 
1.5.3.4

Re: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Grant Likely]

On Thu, May 8, 2008 at 12:25 PM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
> ePAPR drafts propose 'simple-bus' as a generic compatibility type for
>  busses which cannot be probed for devices.  In addition, the Xilinx
>  versions of these IPs seem to be proliferating.  Hence, in the future
>  let's prefer to use the standard names.  I've left the old names in
>  for short term backward compatibility for existing device trees.
>
>  Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>

Acked-by: Grant Likely <grant.likely@secretlab.ca>

I'll queue this up for .27

Cheers,
g.

>  ---
>   arch/powerpc/platforms/40x/virtex.c |    1 +
>   1 files changed, 1 insertions(+), 0 deletions(-)
>
>  diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c
>  index 6c72994..b1ab7b8 100644
>  --- a/arch/powerpc/platforms/40x/virtex.c
>  +++ b/arch/powerpc/platforms/40x/virtex.c
>  @@ -16,6 +16,7 @@
>   #include <asm/xilinx_intc.h>
>
>   static struct of_device_id xilinx_of_bus_ids[] __initdata = {
>  +       { .compatible = "simple-bus", },
>         { .compatible = "xlnx,plb-v46-1.00.a", },
>         { .compatible = "xlnx,plb-v46-1.02.a", },
>         { .compatible = "xlnx,plb-v34-1.01.a", },
>  --
>  1.5.3.4
>
>
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Stephen Neuendorffer]

It appears that this turns out to interact badly with the probing of
PPC_UDBG_16550, which is always enabled on PPC405 (and apparently
found!) even though Virtex devices don't have them.

Steve

> -----Original Message-----
> From: Stephen Neuendorffer [mailto:stephen.neuendorffer@xilinx.com]
> Sent: Thursday, May 08, 2008 11:25 AM
> To: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
grant.likely@secretlab.ca; linuxppc-dev@ozlabs.org
> Cc: Stephen Neuendorffer
> Subject: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.
> =

> ePAPR drafts propose 'simple-bus' as a generic compatibility type for
> busses which cannot be probed for devices.  In addition, the Xilinx
> versions of these IPs seem to be proliferating.  Hence, in the future
> let's prefer to use the standard names.  I've left the old names in
> for short term backward compatibility for existing device trees.
> =

> Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
> ---
>  arch/powerpc/platforms/40x/virtex.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> =

> diff --git a/arch/powerpc/platforms/40x/virtex.c
b/arch/powerpc/platforms/40x/virtex.c
> index 6c72994..b1ab7b8 100644
> --- a/arch/powerpc/platforms/40x/virtex.c
> +++ b/arch/powerpc/platforms/40x/virtex.c
> @@ -16,6 +16,7 @@
>  #include <asm/xilinx_intc.h>
> =

>  static struct of_device_id xilinx_of_bus_ids[] __initdata =3D {
> +	{ .compatible =3D "simple-bus", },
>  	{ .compatible =3D "xlnx,plb-v46-1.00.a", },
>  	{ .compatible =3D "xlnx,plb-v46-1.02.a", },
>  	{ .compatible =3D "xlnx,plb-v34-1.01.a", },
> --
> 1.5.3.4
> =



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Re: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Grant Likely]

On Tue, Jun 3, 2008 at 3:41 PM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
>
> It appears that this turns out to interact badly with the probing of
> PPC_UDBG_16550, which is always enabled on PPC405 (and apparently
> found!) even though Virtex devices don't have them.

What is the symptom?

g.

>
> Steve
>
>> -----Original Message-----
>> From: Stephen Neuendorffer [mailto:stephen.neuendorffer@xilinx.com]
>> Sent: Thursday, May 08, 2008 11:25 AM
>> To: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
> grant.likely@secretlab.ca; linuxppc-dev@ozlabs.org
>> Cc: Stephen Neuendorffer
>> Subject: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.
>>
>> ePAPR drafts propose 'simple-bus' as a generic compatibility type for
>> busses which cannot be probed for devices.  In addition, the Xilinx
>> versions of these IPs seem to be proliferating.  Hence, in the future
>> let's prefer to use the standard names.  I've left the old names in
>> for short term backward compatibility for existing device trees.
>>
>> Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
>> ---
>>  arch/powerpc/platforms/40x/virtex.c |    1 +
>>  1 files changed, 1 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/powerpc/platforms/40x/virtex.c
> b/arch/powerpc/platforms/40x/virtex.c
>> index 6c72994..b1ab7b8 100644
>> --- a/arch/powerpc/platforms/40x/virtex.c
>> +++ b/arch/powerpc/platforms/40x/virtex.c
>> @@ -16,6 +16,7 @@
>>  #include <asm/xilinx_intc.h>
>>
>>  static struct of_device_id xilinx_of_bus_ids[] __initdata = {
>> +     { .compatible = "simple-bus", },
>>       { .compatible = "xlnx,plb-v46-1.00.a", },
>>       { .compatible = "xlnx,plb-v46-1.02.a", },
>>       { .compatible = "xlnx,plb-v34-1.01.a", },
>> --
>> 1.5.3.4

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Stephen Neuendorffer]

legacy_serial identifies a valid ns16550 on a simple-bus, but the
legacy_serial driver doesn't understand the shift and offset flags
necessary to get it to work, which results in no console.

I think the easiest solution is to change the Kconfig so that
PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX.  I've done this
in my tree, but I've been swamped with other things at the moment, so I
haven't verified it.

Or is legacy_serial just legacy at this point and can go away entirely?
I got the impression from some of the earlier discussion that it wasn't
preferred, at least....

Steve

> -----Original Message-----
> From: glikely@secretlab.ca [mailto:glikely@secretlab.ca] On Behalf Of
Grant Likely
> Sent: Friday, June 06, 2008 8:29 AM
> To: Stephen Neuendorffer
> Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
> Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
> =

> On Tue, Jun 3, 2008 at 3:41 PM, Stephen Neuendorffer
> <stephen.neuendorffer@xilinx.com> wrote:
> >
> > It appears that this turns out to interact badly with the probing of
> > PPC_UDBG_16550, which is always enabled on PPC405 (and apparently
> > found!) even though Virtex devices don't have them.
> =

> What is the symptom?
> =

> g.
> =

> >
> > Steve
> >
> >> -----Original Message-----
> >> From: Stephen Neuendorffer [mailto:stephen.neuendorffer@xilinx.com]
> >> Sent: Thursday, May 08, 2008 11:25 AM
> >> To: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
> > grant.likely@secretlab.ca; linuxppc-dev@ozlabs.org
> >> Cc: Stephen Neuendorffer
> >> Subject: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
> >>
> >> ePAPR drafts propose 'simple-bus' as a generic compatibility type
for
> >> busses which cannot be probed for devices.  In addition, the Xilinx
> >> versions of these IPs seem to be proliferating.  Hence, in the
future
> >> let's prefer to use the standard names.  I've left the old names in
> >> for short term backward compatibility for existing device trees.
> >>
> >> Signed-off-by: Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com>
> >> ---
> >>  arch/powerpc/platforms/40x/virtex.c |    1 +
> >>  1 files changed, 1 insertions(+), 0 deletions(-)
> >>
> >> diff --git a/arch/powerpc/platforms/40x/virtex.c
> > b/arch/powerpc/platforms/40x/virtex.c
> >> index 6c72994..b1ab7b8 100644
> >> --- a/arch/powerpc/platforms/40x/virtex.c
> >> +++ b/arch/powerpc/platforms/40x/virtex.c
> >> @@ -16,6 +16,7 @@
> >>  #include <asm/xilinx_intc.h>
> >>
> >>  static struct of_device_id xilinx_of_bus_ids[] __initdata =3D {
> >> +     { .compatible =3D "simple-bus", },
> >>       { .compatible =3D "xlnx,plb-v46-1.00.a", },
> >>       { .compatible =3D "xlnx,plb-v46-1.02.a", },
> >>       { .compatible =3D "xlnx,plb-v34-1.01.a", },
> >> --
> >> 1.5.3.4
> =

> --
> Grant Likely, B.Sc., P.Eng.
> Secret Lab Technologies Ltd.


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Re: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Grant Likely]

On Fri, Jun 6, 2008 at 10:16 AM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
>
> legacy_serial identifies a valid ns16550 on a simple-bus, but the
> legacy_serial driver doesn't understand the shift and offset flags
> necessary to get it to work, which results in no console.
>
> I think the easiest solution is to change the Kconfig so that
> PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX.  I've done this
> in my tree, but I've been swamped with other things at the moment, so I
> haven't verified it.

This is an easy solution, but it is not a good one.  Doing so would
break UDBG on other 405 boards when building multiplatform kernels.
It would be better to teach legacy serial about the shift and offset.
Alternately, add code to add_legacy_soc_port() to skip it if the
shift/offset properties are present.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Stephen Neuendorffer]

[-- Attachment #1: Type: text/plain, Size: 1845 bytes --]


Is there really much of a chance of that, given the differences with the bootwrappers?
Does anyone care enough about legacy_serial for this to matter?   My impression was that legacy serial was not preferred anyway...

Steve

-----Original Message-----
From: glikely@secretlab.ca on behalf of Grant Likely
Sent: Sat 6/28/2008 1:33 PM
To: Stephen Neuendorffer
Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com; linuxppc-dev@ozlabs.org; git
Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.
 
On Fri, Jun 6, 2008 at 10:16 AM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
>
> legacy_serial identifies a valid ns16550 on a simple-bus, but the
> legacy_serial driver doesn't understand the shift and offset flags
> necessary to get it to work, which results in no console.
>
> I think the easiest solution is to change the Kconfig so that
> PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX.  I've done this
> in my tree, but I've been swamped with other things at the moment, so I
> haven't verified it.

This is an easy solution, but it is not a good one.  Doing so would
break UDBG on other 405 boards when building multiplatform kernels.
It would be better to teach legacy serial about the shift and offset.
Alternately, add code to add_legacy_soc_port() to skip it if the
shift/offset properties are present.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.




This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.


[-- Attachment #2: Type: text/html, Size: 2473 bytes --]

RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[John Linn]

I still have bad dreams about the of_serial patch I did as a newbie
related to reg_shift and reg_offset ;)

I'm still a newbie, but we'll do whatever needs to be done. =


Any thoughts from Josh?

-- John

-----Original Message-----
From: Stephen Neuendorffer =

Sent: Sunday, June 29, 2008 9:42 PM
To: grant.likely@secretlab.ca
Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
Subject: RE: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.


Is there really much of a chance of that, given the differences with the
bootwrappers?
Does anyone care enough about legacy_serial for this to matter?   My
impression was that legacy serial was not preferred anyway...

Steve

-----Original Message-----
From: glikely@secretlab.ca on behalf of Grant Likely
Sent: Sat 6/28/2008 1:33 PM
To: Stephen Neuendorffer
Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
 =

On Fri, Jun 6, 2008 at 10:16 AM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
>
> legacy_serial identifies a valid ns16550 on a simple-bus, but the
> legacy_serial driver doesn't understand the shift and offset flags
> necessary to get it to work, which results in no console.
>
> I think the easiest solution is to change the Kconfig so that
> PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX.  I've done
this
> in my tree, but I've been swamped with other things at the moment, so
I
> haven't verified it.

This is an easy solution, but it is not a good one.  Doing so would
break UDBG on other 405 boards when building multiplatform kernels.
It would be better to teach legacy serial about the shift and offset.
Alternately, add code to add_legacy_soc_port() to skip it if the
shift/offset properties are present.

Cheers,
g.

-- =

Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.



This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.

Re: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Grant Likely]

Stephen Neuendorffer wrote:
> Grant Likely wrote:
> > > I think the easiest solution is to change the Kconfig so that
> > > PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX.  I've done this
> > > in my tree, but I've been swamped with other things at the moment, so I
> > > haven't verified it.
> > 
> > This is an easy solution, but it is not a good one.  Doing so would
> > break UDBG on other 405 boards when building multiplatform kernels.
> > It would be better to teach legacy serial about the shift and offset.
> > Alternately, add code to add_legacy_soc_port() to skip it if the
> > shift/offset properties are present.
> 
> Is there really much of a chance of that, given the differences
> with the bootwrappers?  Does anyone care enough about legacy_serial
> for this to matter?   My impression was that legacy serial was not
> preferred anyway...

You never know, a single kernel build can be wrapped multiple times, and
besides, it is a trivial fix.  Just add a test for the presence of
reg-shift and bail if it is present.

I don't know much about the history of legacy serial, but I do not
support adding multiplatform restrictions when not needed.
legacy_serial may be crusty, but it does have the advantage of
supporting UDBG which is a useful feature.  It may or may not go away.

Cheers,
g.

RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Stephen Neuendorffer]

Ah.. good idea... hadn't thought of that, I guess.

John Linn: I have no time to look at this.  Can you see if such a fix
fixes the problem?

Steve

> -----Original Message-----
> From: Grant Likely [mailto:glikely@secretlab.ca] On Behalf Of Grant
Likely
> Sent: Monday, June 30, 2008 9:34 AM
> To: Stephen Neuendorffer
> Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
> Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
> =

> Stephen Neuendorffer wrote:
> > Grant Likely wrote:
> > > > I think the easiest solution is to change the Kconfig so that
> > > > PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX.  I've
done this
> > > > in my tree, but I've been swamped with other things at the
moment, so I
> > > > haven't verified it.
> > >
> > > This is an easy solution, but it is not a good one.  Doing so
would
> > > break UDBG on other 405 boards when building multiplatform
kernels.
> > > It would be better to teach legacy serial about the shift and
offset.
> > > Alternately, add code to add_legacy_soc_port() to skip it if the
> > > shift/offset properties are present.
> >
> > Is there really much of a chance of that, given the differences
> > with the bootwrappers?  Does anyone care enough about legacy_serial
> > for this to matter?   My impression was that legacy serial was not
> > preferred anyway...
> =

> You never know, a single kernel build can be wrapped multiple times,
and
> besides, it is a trivial fix.  Just add a test for the presence of
> reg-shift and bail if it is present.
> =

> I don't know much about the history of legacy serial, but I do not
> support adding multiplatform restrictions when not needed.
> legacy_serial may be crusty, but it does have the advantage of
> supporting UDBG which is a useful feature.  It may or may not go away.
> =

> Cheers,
> g.
> =



This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.

RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[John Linn]

I'll give it a try, sounds easy.

-- John

-----Original Message-----
From: Stephen Neuendorffer =

Sent: Monday, June 30, 2008 10:49 AM
To: grant.likely@secretlab.ca; John Linn
Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
Subject: RE: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.


Ah.. good idea... hadn't thought of that, I guess.

John Linn: I have no time to look at this.  Can you see if such a fix
fixes the problem?

Steve

> -----Original Message-----
> From: Grant Likely [mailto:glikely@secretlab.ca] On Behalf Of Grant
Likely
> Sent: Monday, June 30, 2008 9:34 AM
> To: Stephen Neuendorffer
> Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
> Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
> =

> Stephen Neuendorffer wrote:
> > Grant Likely wrote:
> > > > I think the easiest solution is to change the Kconfig so that
> > > > PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX.  I've
done this
> > > > in my tree, but I've been swamped with other things at the
moment, so I
> > > > haven't verified it.
> > >
> > > This is an easy solution, but it is not a good one.  Doing so
would
> > > break UDBG on other 405 boards when building multiplatform
kernels.
> > > It would be better to teach legacy serial about the shift and
offset.
> > > Alternately, add code to add_legacy_soc_port() to skip it if the
> > > shift/offset properties are present.
> >
> > Is there really much of a chance of that, given the differences
> > with the bootwrappers?  Does anyone care enough about legacy_serial
> > for this to matter?   My impression was that legacy serial was not
> > preferred anyway...
> =

> You never know, a single kernel build can be wrapped multiple times,
and
> besides, it is a trivial fix.  Just add a test for the presence of
> reg-shift and bail if it is present.
> =

> I don't know much about the history of legacy serial, but I do not
> support adding multiplatform restrictions when not needed.
> legacy_serial may be crusty, but it does have the advantage of
> supporting UDBG which is a useful feature.  It may or may not go away.
> =

> Cheers,
> g.
> =



This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.

RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.

[Benjamin Herrenschmidt]

On Fri, 2008-06-06 at 09:16 -0700, Stephen Neuendorffer wrote:
> legacy_serial identifies a valid ns16550 on a simple-bus, but the
> legacy_serial driver doesn't understand the shift and offset flags
> necessary to get it to work, which results in no console.
> 
> I think the easiest solution is to change the Kconfig so that
> PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX.  I've done this
> in my tree, but I've been swamped with other things at the moment, so I
> haven't verified it.
> 
> Or is legacy_serial just legacy at this point and can go away entirely?
> I got the impression from some of the earlier discussion that it wasn't
> preferred, at least....

No, legacy serial is useful. Just grow it an understanding of the shift
& offset bits :-)

Cheers,
Ben.