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From: Juergen Beisert <jbe@pengutronix.de>
To: linuxppc-dev@ozlabs.org
Cc: Wolfram Sang <w.sang@pengutronix.de>, domen.puncer@telargo.com
Subject: Re: [BUG] fec_mpc52xx: Don't call mpc52xx_fec_reset() in ISR
Date: Wed, 13 Aug 2008 15:48:11 +0200	[thread overview]
Message-ID: <200808131548.11813.jbe@pengutronix.de> (raw)
In-Reply-To: <20080710153101.GD446@secretlab.ca>

On Donnerstag, 10. Juli 2008, Grant Likely wrote:
> On Thu, Jul 10, 2008 at 02:39:09PM +0200, Wolfram Sang wrote:
> > Hello,
> >
> > today, I was debugging a kernel crash on a board with a MPC5200B using
> > 2.6.26-rc9. I found the following code in drivers/net/fec_mpc52xx.c:
>
> <snip>
>
> > I assume the proper thing to do is to set a flag in the ISR and handle
> > the soft reset later in some other context. Having never dealt with the
> > network core and its drivers so far, I am not sure which place would be
> > the right one to perform the soft reset. To not make things worse, I
> > hope people with more insight to network stuff can deliver a suitable
> > solution to this problem.
>
> Thanks for the bug report.  I'll take a look.

Some update:

Enabling XLB pipelining let occure this error less often. Kernel disables t=
his=20
feature by default yet.
The comment talks about "cfr errate 292." that is valid for MPC5200A, but=20
_it_seems_ no longer for MPC5200B. Has anybody experience if we can enablin=
g=20
pipelining on MPC5200B CPUs without triggering this bug?

We currently are playing with this setting:

Index: arch/powerpc/platforms/52xx/mpc52xx_common.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
=2D-- arch/powerpc/platforms/52xx/mpc52xx_common.c.orig
+++ arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -99,11 +99,11 @@
 	out_be32(&xlb->master_pri_enable, 0xff);
 	out_be32(&xlb->master_priority, 0x11111111);
=20
=2D	/* Disable XLB pipelining
=2D	 * (cfr errate 292. We could do this only just before ATA PIO
=2D	 *  transaction and re-enable it afterwards ...)
+	/*
+	 * Enable pipelining, fixes FEC problems. The previous workaround seems
+	 * not needed, as we have an MPC5200B (not A).
 	 */
=2D	out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
+	out_be32(&xlb->config, in_be32(&xlb->config) & ~MPC52xx_XLB_CFG_PLDIS);
=20
 	iounmap(xlb);
 }

jbe

=2D-=20
Dipl.-Ing. Juergen Beisert | http://www.pengutronix.de
=A0Pengutronix - Linux Solutions for Science and Industry
=A0   Handelsregister: Amtsgericht Hildesheim, HRA 2686
=A0 =A0 =A0    Vertretung Sued/Muenchen, Germany
   Phone: +49-8766-939 228 |  Fax: +49-5121-206917-9

  reply	other threads:[~2008-08-13 13:48 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-07-10 12:39 [BUG] fec_mpc52xx: Don't call mpc52xx_fec_reset() in ISR Wolfram Sang
2008-07-10 15:31 ` Grant Likely
2008-08-13 13:48   ` Juergen Beisert [this message]
2008-08-13 14:12     ` Wolfgang Grandegger
2008-08-15 11:45       ` Wolfram Sang
2008-07-27  1:31 ` Grant Likely

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