From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from sunset.davemloft.net (unknown [74.93.104.97]) by ozlabs.org (Postfix) with ESMTP id 96F2447719 for ; Fri, 22 Aug 2008 08:28:58 +1000 (EST) Date: Thu, 21 Aug 2008 15:28:57 -0700 (PDT) Message-Id: <20080821.152857.84114588.davem@davemloft.net> To: benh@kernel.crashing.org Subject: Re: [PATCH 0/3]: Sparc OF I2C support. From: David Miller In-Reply-To: <1219356302.21386.147.camel@pasglop> References: <20080821.142134.127315039.davem@davemloft.net> <48ADDF86.2040200@freescale.com> <1219356302.21386.147.camel@pasglop> Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Cc: scottwood@freescale.com, sparclinux@vger.kernel.org, paulus@samba.org, linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Benjamin Herrenschmidt Date: Fri, 22 Aug 2008 08:05:02 +1000 > Apple additionally have different ways of representing multiple busses > on one controller though. On some machines, they just use bits 0xF00 of > the address as the bus number, which is a bit gross, and on some, they > have sub-nodes i2c-bus@NN under the controller. Ok, Sun uses a 2-cell scheme. We can handle both cases of reg encoding quite easily: 1) If there is a single cell, tread bits 8 and above as bus number. They will be zero on Sparc. 2) If there are two cells, first cell is bus number. For the hierarchical case, I'm not so sure how to handle it. Also, last night, I posted patches to the I2C list to add bus addressing support to the I2C code and the PCF algo implementation.