From: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
To: "Grant Likely" <grant.likely@secretlab.ca>,
"Shanyuan Gao" <sygao.research@gmail.com>
Cc: linuxppc-embedded <linuxppc-embedded@ozlabs.org>
Subject: RE: Back port Virtex5 FPU to Virtex4?
Date: Wed, 17 Sep 2008 11:03:56 -0700 [thread overview]
Message-ID: <20080917180357.2C91B7F8080@mail38-dub.bigfish.com> (raw)
In-Reply-To: <20080917173555.GA7913@secretlab.ca>
Sorry, I missed your original question:
There's a very complex tradeoff with these cores, in terms of clock
speed of the processor, clock speed of the FPU, errata workarounds, etc.
Generally, In V4, DP floating point code ends up about the same speed
whether you use the DP core and accept the system limitations or just
use a well tuned DP floating point emulation library with the core
frequency as fast as possible: hence we usually recommend for most
purposes, people use the floating point emulation libraries in V4 for
double precision. My understanding is that the IBM libraries are
significantly better than the gcc libraries in this respect...
Steve
> -----Original Message-----
> From: linuxppc-embedded-bounces+stephen=3Dneuendorffer.name@ozlabs.org
[mailto:linuxppc-embedded-
> bounces+stephen=3Dneuendorffer.name@ozlabs.org] On Behalf Of Grant
Likely
> Sent: Wednesday, September 17, 2008 10:36 AM
> To: Shanyuan Gao
> Cc: linuxppc-embedded
> Subject: Re: Back port Virtex5 FPU to Virtex4?
> =
> On Tue, Aug 26, 2008 at 04:00:42PM -0400, Shanyuan Gao wrote:
> > I am working with ML410 and have FPU (single precision) working.
> > However, the FPU for V5 looks more attractive because it's double
> > precision. So is it possible to back port the double precision FPU
to
> > V4?
> =
> As far as I understand there are limitations in the V4 APU interface
> that makes the full double precision FPU unfeasible. The Xilinx folks
> can correct me if I'm wrong.
> =
> g.
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prev parent reply other threads:[~2008-09-17 18:04 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-08-26 20:00 Back port Virtex5 FPU to Virtex4? Shanyuan Gao
2008-09-17 17:35 ` Grant Likely
2008-09-17 18:03 ` Stephen Neuendorffer [this message]
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