Cache control

Cache control

[Robert Woodworth]

I have a Virtex4 VF60 device with 256MB DDR2.

I have told the Linux kernel that the device has only 128MB and its  
working fine.  There is an HDL module that is populating the next 16MB  
with sensor data (0x08000000 - 0x09000000)  I mapped the area into my  
driver via `ioremap()` and also via `mmap / remap_pfn_range()`  It  
works fine.

I know that PPC cache regions work in 128MB blocks.  I assume that the  
kernel bootup is turning on cache in the first 128, because it thinks  
that its the full RAM range, and not cached in the next 128MB.

I know that if I declare the area cached, and invalidate the region  
before I read it,  the reads should be much faster than if it's not  
cached.


How can I control if the area is cached? and then invalidate it when  
new data arrives?

Is there a PPC/Linux API call to declare the region cached and  
invalidate regions before read?





Rob.

Re: Cache control

[Marco Stornelli]

Hi Robert,

Robert Woodworth ha scritto:
> I have a Virtex4 VF60 device with 256MB DDR2.
> 
> I have told the Linux kernel that the device has only 128MB and its
> working fine. 

How? Have you used the mem kernel option?

 There is an HDL module that is populating the next 16MB
> with sensor data (0x08000000 - 0x09000000)  I mapped the area into my
> driver via `ioremap()` and also via `mmap / remap_pfn_range()`  It works
> fine.
> 
> I know that PPC cache regions work in 128MB blocks.  I assume that the
> kernel bootup is turning on cache in the first 128, because it thinks
> that its the full RAM range, and not cached in the next 128MB.
> 
> I know that if I declare the area cached, and invalidate the region
> before I read it,  the reads should be much faster than if it's not cached.
> 
> 
> How can I control if the area is cached? and then invalidate it when new
> data arrives?

If you use the ioremap, it provides non-cacheable guarded mappings,
indeed it calls __ioremap with _PAGE_NO_CACHE and _PAGE_GUARDED flags.
You can try to call directly __ioremap with the proper flags.

> 
> Is there a PPC/Linux API call to declare the region cached and
> invalidate regions before read?
> 

Yes, of course. You can see the arch/powerpc/include/asm/cacheflush.h
file to view the API to manage the cache.

> 
> 
> 
> 
> Rob.
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> 

Regards,

-- 
Marco Stornelli
Embedded Software Engineer
CoRiTeL - Consorzio di Ricerca sulle Telecomunicazioni
http://www.coritel.it

marco.stornelli@coritel.it
+39 06 72582838

Re: Cache control

[Grant Likely]

On Thu, Oct 16, 2008 at 09:57:27AM -0600, Robert Woodworth wrote:
> I have a Virtex4 VF60 device with 256MB DDR2.
>
> I have told the Linux kernel that the device has only 128MB and its  
> working fine.  There is an HDL module that is populating the next 16MB  
> with sensor data (0x08000000 - 0x09000000)  I mapped the area into my  
> driver via `ioremap()` and also via `mmap / remap_pfn_range()`  It works 
> fine.
>
> I know that PPC cache regions work in 128MB blocks.  I assume that the  
> kernel bootup is turning on cache in the first 128, because it thinks  
> that its the full RAM range, and not cached in the next 128MB.

That's only true when the MMU is off.  Linux runs with the MMU on and
the TLB entries specify the caching per mapping.

> I know that if I declare the area cached, and invalidate the region  
> before I read it,  the reads should be much faster than if it's not  
> cached.

Correct.

> How can I control if the area is cached? and then invalidate it when new 
> data arrives?
>
> Is there a PPC/Linux API call to declare the region cached and  
> invalidate regions before read?

Take a look at dma_alloc_coherent() and related functions.

Cheers,
g.