Re: [rfc][patch] powerpc: replace isync with lwsync

[Nick Piggin <npiggin@suse.de>]

On Mon, Nov 03, 2008 at 04:32:22PM +1100, Paul Mackerras wrote:
> Nick Piggin writes:
> 
> > This is an interesting one for me. AFAIKS it is possible to use lwsync for
> > a full barrier after a successful ll/sc operation, right? (or stop me here
> > if I'm wrong).
> 
> An lwsync would order subsequent loads after the lwarx/ldarx, and
> subsequent stores after the stcwx./stcdx., which should be good
> enough.

OK, thanks for confirmation.
 

> > isync followed by a branch I guess does something like puts a bubble
> > into the pipeline until the branch retires? So it is probably always
> > going to cost some cycles.
> 
> I don't know about "retires", but isync is going to stop following
> instructions from executing until the outcome of the branch is known.

OK, I probably don't use the right terminology. I assume the branch
retires when its outcome is known and the CPU starts executing the
result.


> On machines that don't have lwsync we will still want to use isync
> (since the other alternative would be the full heavyweight sync).
> Your patch doesn't seem to do that.

No, it's just a quick hack at the moment. I think your reply gets it
past the not-totally-broken stage :) But at this point I can't justify
sending such a change upstream based on a small improvement on G5. I
would like to know about newer POWER CPUs, and even unreleased ones.
If there is some reason lwsync gets relatively more constraining or
difficult to execute than isync, then maybe this change is not useful.

Thanks,
Nick