Re: [PATCH v5] spi: Add PPC4xx SPI driver

[Wolfgang Denk <wd@denx.de>]

Dear Stefan,

In message <200901051912.25874.sr@denx.de> you wrote:
>
> > > +	/* Write new configration */
> > > +	out_8(&hw->regs->mode, cs->mode);
> > > +
> > > +	/*
> > > +	 * Allow platform reduce the interrupt load on the CPU during SPI
> > > +	 * transfers. We do not target maximum performance, but rather allow
> > > +	 * platform to limit SPI bus frequency and interrupt rate.
> >
> > That comment doesn't seem even vaguely related to the
> > code it allegedly refers to ... nothing in this routine
> > affects the IRQ load.
> 
> IIRC (I didn't write the original version of this driver) then this comments 
> simply refers to the fact that the platform can select a maximum SPI 
> frequency via spi->max_speed_hz which is pretty obvious. So I'll just remove 
> this comment in the next version.

On PPC4xx systems we get one interrupt per transferred  byte,  i.  e.
there  is  a  direct relation between SPI bus frequency and interrupt
rate.

Since this is a PPC4xx SPI driver, the comment is actually helpful to
understand the operation of the driver especially in relation to  the
limitations of the hardware.

Instead of removing the  comment  (which  leaves  the  casual  reader
clueless)  it  would probably better to add a sentence explaining the
one byte / one interrupt situation?

Best regards,

Wolfgang Denk

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