From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from sunset.davemloft.net (74-93-104-97-Washington.hfc.comcastbusiness.net [74.93.104.97]) by ozlabs.org (Postfix) with ESMTP id EF96DDDE9F for ; Thu, 30 Apr 2009 07:51:53 +1000 (EST) Date: Wed, 29 Apr 2009 14:51:45 -0700 (PDT) Message-Id: <20090429.145145.49692653.davem@davemloft.net> To: galak@kernel.crashing.org Subject: Re: [PATCH 3/6] net/ucc_geth: update riscTx and riscRx in ucc_geth From: David Miller In-Reply-To: References: <12410288792524-git-send-email-Haiying.Wang@freescale.com> <12410288811793-git-send-email-Haiying.Wang@freescale.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Cc: linuxppc-dev@ozlabs.org, netdev@vger.kernel.org, Haiying.Wang@freescale.com List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Kumar Gala Date: Wed, 29 Apr 2009 15:23:21 -0500 > > On Apr 29, 2009, at 1:14 PM, Haiying Wang wrote: > >> Change the definition of riscTx and riscRx to unsigned integer instead >> of enum, >> and change their values to support 4 risc allocation if the qe has 4 >> RISC >> engines. >> >> Signed-off-by: Haiying Wang >> --- > > Dave, if you can ack this it is probably easier if this goes via the > powerpc tree as it had some dependancies. Fair enough: Acked-by: David S. Miller