From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e28smtp04.in.ibm.com (e28smtp04.in.ibm.com [59.145.155.4]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "e28smtp04.in.ibm.com", Issuer "Equifax" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 6458EDE88C for ; Thu, 14 May 2009 23:45:37 +1000 (EST) Received: from d28relay02.in.ibm.com (d28relay02.in.ibm.com [9.184.220.59]) by e28smtp04.in.ibm.com (8.13.1/8.13.1) with ESMTP id n4EDjVFP009400 for ; Thu, 14 May 2009 19:15:31 +0530 Received: from d28av02.in.ibm.com (d28av02.in.ibm.com [9.184.220.64]) by d28relay02.in.ibm.com (8.13.8/8.13.8/NCO v9.2) with ESMTP id n4EDjVU82150654 for ; Thu, 14 May 2009 19:15:31 +0530 Received: from d28av02.in.ibm.com (loopback [127.0.0.1]) by d28av02.in.ibm.com (8.13.1/8.13.3) with ESMTP id n4EDjV6t031440 for ; Thu, 14 May 2009 23:45:31 +1000 Date: Thu, 14 May 2009 19:15:28 +0530 From: "K.Prasad" To: linuxppc-dev@ozlabs.org Subject: [RFC Patch 4/6] Modify process handling code to handle hardware debug registers Message-ID: <20090514134528.GE14229@in.ibm.com> References: <20090514133312.360702378@prasadkr_t60p.in.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Michael Neuling , Benjamin Herrenschmidt , Alan Stern , paulus@samba.org, "K.Prasad" , Roland McGrath List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Modify process handling code to recognise hardware debug registers during copy and flush operations. Introduce a new TIF_DEBUG task flag to indicate a process's use of debug register. Signed-off-by: K.Prasad --- arch/powerpc/include/asm/thread_info.h | 2 arch/powerpc/kernel/process.c | 18 + Index: linux-2.6-tip.hbkpt/arch/powerpc/include/asm/thread_info.h =================================================================== --- linux-2.6-tip.hbkpt.orig/arch/powerpc/include/asm/thread_info.h +++ linux-2.6-tip.hbkpt/arch/powerpc/include/asm/thread_info.h @@ -114,6 +114,7 @@ static inline struct thread_info *curren #define TIF_FREEZE 14 /* Freezing for suspend */ #define TIF_RUNLATCH 15 /* Is the runlatch enabled? */ #define TIF_ABI_PENDING 16 /* 32/64 bit switch needed */ +#define TIF_DEBUG 17 /* uses debug registers */ /* as above, but as bit values */ #define _TIF_SYSCALL_TRACE (1< #ifdef CONFIG_PPC64 #include +#include #endif #include #include @@ -254,8 +255,10 @@ void do_dabr(struct pt_regs *regs, unsig 11, SIGSEGV) == NOTIFY_STOP) return; +#ifndef CONFIG_PPC64 if (debugger_dabr_match(regs)) return; +#endif /* Clear the DAC and struct entries. One shot trigger */ #if defined(CONFIG_BOOKE) @@ -372,8 +375,13 @@ struct task_struct *__switch_to(struct t #endif /* CONFIG_SMP */ +#ifdef CONFIG_PPC64 + if (unlikely(test_tsk_thread_flag(new, TIF_DEBUG))) + switch_to_thread_hw_breakpoint(new); +#else if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) set_dabr(new->thread.dabr); +#endif /* CONFIG_PPC64 */ #if defined(CONFIG_BOOKE) /* If new thread DAC (HW breakpoint) is the same then leave it */ @@ -550,6 +558,10 @@ void show_regs(struct pt_regs * regs) void exit_thread(void) { discard_lazy_cpu_state(); +#ifdef CONFIG_PPC64 + if (unlikely(test_tsk_thread_flag(current, TIF_DEBUG))) + flush_thread_hw_breakpoint(current); +#endif /* CONFIG_PPC64 */ } void flush_thread(void) @@ -605,6 +617,9 @@ int copy_thread(unsigned long clone_flag struct pt_regs *childregs, *kregs; extern void ret_from_fork(void); unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; +#ifdef CONFIG_PPC64 + struct task_struct *tsk = current; +#endif CHECK_FULL_REGS(regs); /* Copy registers */ @@ -672,6 +687,9 @@ int copy_thread(unsigned long clone_flag * function. */ kregs->nip = *((unsigned long *)ret_from_fork); + + if (unlikely(test_tsk_thread_flag(tsk, TIF_DEBUG))) + copy_thread_hw_breakpoint(tsk, p, clone_flags); #else kregs->nip = (unsigned long)ret_from_fork; #endif