From: "K.Prasad" <prasad@linux.vnet.ibm.com>
To: linuxppc-dev@ozlabs.org
Cc: Michael Neuling <mikey@neuling.org>,
Benjamin Herrenschmidt <benh@au1.ibm.com>,
Alan Stern <stern@rowland.harvard.edu>,
paulus@samba.org, "K.Prasad" <prasad@linux.vnet.ibm.com>,
Roland McGrath <roland@redhat.com>
Subject: [RFC Patch 6/6] Adapt kexec and samples code to recognise PPC64 hardware breakpoint usage
Date: Thu, 14 May 2009 19:16:14 +0530 [thread overview]
Message-ID: <20090514134614.GG14229@in.ibm.com> (raw)
In-Reply-To: 20090514133312.360702378@prasadkr_t60p.in.ibm.com
Modify kexec code to disable DABR registers before a reboot. Adapt the samples
code to populate PPC64-arch specific fields.
Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
---
arch/powerpc/kernel/machine_kexec_64.c | 6
samples/hw_breakpoint/data_breakpoint.c | 4
Index: linux-2.6-tip.hbkpt/arch/powerpc/kernel/machine_kexec_64.c
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/kernel/machine_kexec_64.c 2009-05-14 00:17:24.000000000 +0530
+++ linux-2.6-tip.hbkpt/arch/powerpc/kernel/machine_kexec_64.c 2009-05-14 09:48:09.000000000 +0530
@@ -24,6 +24,7 @@
#include <asm/sections.h> /* _end */
#include <asm/prom.h>
#include <asm/smp.h>
+#include <asm/hw_breakpoint.h>
int default_machine_kexec_prepare(struct kimage *image)
{
@@ -214,6 +215,9 @@
put_cpu();
local_irq_disable();
+#ifdef CONFIG_PPC64
+ hw_breakpoint_disable();
+#endif
}
#else /* ! SMP */
@@ -233,6 +237,9 @@
if (ppc_md.kexec_cpu_down)
ppc_md.kexec_cpu_down(0, 0);
local_irq_disable();
+#ifdef CONFIG_PPC64
+ hw_breakpoint_disable();
+#endif
}
#endif /* SMP */
Index: linux-2.6-tip.hbkpt/samples/hw_breakpoint/data_breakpoint.c
===================================================================
--- linux-2.6-tip.hbkpt.orig/samples/hw_breakpoint/data_breakpoint.c 2009-05-14 00:17:24.000000000 +0530
+++ linux-2.6-tip.hbkpt/samples/hw_breakpoint/data_breakpoint.c 2009-05-14 00:58:06.000000000 +0530
@@ -54,6 +54,10 @@
sample_hbp.info.type = HW_BREAKPOINT_WRITE;
sample_hbp.info.len = HW_BREAKPOINT_LEN_4;
#endif /* CONFIG_X86 */
+#ifdef CONFIG_PPC64
+ sample_hbp.info.name = ksym_name;
+ sample_hbp.info.type = DABR_DATA_WRITE;
+#endif /* CONFIG_PPC64 */
sample_hbp.triggered = (void *)sample_hbp_handler;
next prev parent reply other threads:[~2009-05-14 13:46 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20090514133312.360702378@prasadkr_t60p.in.ibm.com>
2009-05-14 13:43 ` [RFC Patch 1/6] Prepare the PowerPC platform for HW Breakpoint infrastructure K.Prasad
2009-05-18 3:35 ` Benjamin Herrenschmidt
2009-05-18 16:15 ` K.Prasad
2009-05-14 13:44 ` [RFC Patch 2/6] Introduce PPC64 specific Hardware Breakpoint interfaces K.Prasad
2009-05-14 14:50 ` Michael Ellerman
2009-05-14 19:50 ` [RFC Patch 2/6] Introduce PPC64 specific Hardware Breakpointinterfaces K.Prasad
2009-05-14 20:20 ` Alan Stern
2009-05-18 16:10 ` K.Prasad
2009-05-18 16:30 ` Alan Stern
2009-05-21 7:15 ` K.Prasad
2009-05-14 13:45 ` [RFC Patch 3/6] Modify ptrace code to use Hardware Breakpoint interfaces K.Prasad
2009-05-14 13:45 ` [RFC Patch 4/6] Modify process handling code to handle hardware debug registers K.Prasad
2009-05-14 14:54 ` Michael Ellerman
2009-05-14 13:45 ` [RFC Patch 5/6] Modify Data storage exception code to recognise DABR match first K.Prasad
2009-05-14 13:46 ` K.Prasad [this message]
2009-05-14 13:59 ` [RFC Patch 6/6] Adapt kexec and samples code to recognise PPC64 hardware breakpoint usage Geert Uytterhoeven
2009-05-14 14:11 ` Michael Ellerman
2009-05-14 14:18 ` Geert Uytterhoeven
2009-05-14 14:55 ` Michael Ellerman
2009-05-14 19:15 ` [RFC Patch 6/6] Adapt kexec and samples code to recognise PPC64hardware " K.Prasad
2009-05-14 20:21 ` [RFC Patch 6/6] Adapt kexec and samples code to recognise PPC64 hardware " Alan Stern
2009-05-18 16:11 ` [RFC Patch 6/6] Adapt kexec and samples code to recognise PPC64hardware " K.Prasad
[not found] <20090521070751.156865078@prasadkr_t60p.in.ibm.com>
2009-05-21 7:18 ` [RFC Patch 6/6] Adapt kexec and samples code to recognise PPC64 hardware " K.Prasad
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