From: Wolfram Sang <w.sang@pengutronix.de>
To: Grant Likely <grant.likely@secretlab.ca>
Cc: linuxppc-dev@ozlabs.org, Eric Millbrandt <emillbrandt@dekaresearch.com>
Subject: Re: mpc5200 fec error
Date: Wed, 20 May 2009 19:57:06 +0200 [thread overview]
Message-ID: <20090520175706.GA13287@pengutronix.de> (raw)
In-Reply-To: <fa686aa40905200949q1fbeee8fy4b3a06d8e44d7c6b@mail.gmail.com>
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> Yes, that sounds familiar. Most likely, the value of the MDIO bus
> control register got clobbered and not reset when the FEC was reset.
I recall that I wondered about the RFIFO-error case back then. The manual states
===
Receive FIFO Error - indicates error occurred within the RX FIFO. When
RFIFO_ERROR bit is set, ECNTRL.ETHER_EN is cleared, halting FEC frame
processing. When this occurs, software must ensure both the FIFO Controller and
BestComm are soft-reset.
===
It does not say that the whole FEC needs to be reset. (BTW doing a full FEC
reset in IRQ context caused OOPSes back then, have to dig up details, as it
doesn't seem to happen here...)
Regards,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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prev parent reply other threads:[~2009-05-20 17:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-05-18 17:36 mpc5200 fec error Eric Millbrandt
2009-05-19 20:36 ` Robert Schwebel
2009-05-19 20:57 ` Wolfram Sang
2009-05-19 22:21 ` Eric Millbrandt
2009-05-19 23:36 ` Grant Likely
2009-05-20 6:42 ` Wolfram Sang
2009-05-20 13:42 ` Eric Millbrandt
2009-05-20 15:14 ` Jon Smirl
2009-05-20 15:28 ` Eric Millbrandt
2009-05-20 15:29 ` Jon Smirl
2009-05-20 16:41 ` Eric Millbrandt
2009-05-20 16:49 ` Grant Likely
2009-05-20 17:26 ` Eric Millbrandt
2009-05-20 17:41 ` Grant Likely
2009-05-20 17:57 ` Wolfram Sang [this message]
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