[PATCH 4/20] powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.

[PATCH 4/20] powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.

[Benjamin Herrenschmidt]

This adds the opcode definitions to ppc-opcode.h for the two instructions
tlbivax and tlbsrx. as defined by Book3E 2.06

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---

 arch/powerpc/include/asm/ppc-opcode.h |    6 ++++++
 1 file changed, 6 insertions(+)

--- linux-work.orig/arch/powerpc/include/asm/ppc-opcode.h	2009-07-22 15:25:45.000000000 +1000
+++ linux-work/arch/powerpc/include/asm/ppc-opcode.h	2009-07-22 15:26:05.000000000 +1000
@@ -48,6 +48,8 @@
 #define PPC_INST_TLBIE			0x7c000264
 #define PPC_INST_TLBILX			0x7c000024
 #define PPC_INST_WAIT			0x7c00007c
+#define PPC_INST_TLBIVAX		0x7c000624
+#define PPC_INST_TLBSRX_DOT		0x7c0006a5
 
 /* macros to insert fields into opcodes */
 #define __PPC_RA(a)	(((a) & 0x1f) << 16)
@@ -76,6 +78,10 @@
 					__PPC_WC(w))
 #define PPC_TLBIE(lp,a) 	stringify_in_c(.long PPC_INST_TLBIE | \
 					       __PPC_RB(a) | __PPC_RS(lp))
+#define PPC_TLBSRX_DOT(a,b)	stringify_in_c(.long PPC_INST_TLBSRX_DOT | \
+					__PPC_RA(a) | __PPC_RB(b))
+#define PPC_TLBIVAX(a,b)	stringify_in_c(.long PPC_INST_TLBIVAX | \
+					__PPC_RA(a) | __PPC_RB(b))
 
 /*
  * Define what the VSX XX1 form instructions will look like, then add

Re: [PATCH 4/20] powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.

[Kumar Gala]

On Jul 23, 2009, at 12:59 AM, Benjamin Herrenschmidt wrote:

> This adds the opcode definitions to ppc-opcode.h for the two  
> instructions
> tlbivax and tlbsrx. as defined by Book3E 2.06
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> ---
>
> arch/powerpc/include/asm/ppc-opcode.h |    6 ++++++
> 1 file changed, 6 insertions(+)

Do we really have binutils that don't have tlbivax properly at this  
point?

- k

Re: [PATCH 4/20] powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.

[Benjamin Herrenschmidt]

On Thu, 2009-07-23 at 10:55 -0500, Kumar Gala wrote:
> On Jul 23, 2009, at 12:59 AM, Benjamin Herrenschmidt wrote:
> 
> > This adds the opcode definitions to ppc-opcode.h for the two  
> > instructions
> > tlbivax and tlbsrx. as defined by Book3E 2.06
> >
> > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > ---
> >
> > arch/powerpc/include/asm/ppc-opcode.h |    6 ++++++
> > 1 file changed, 6 insertions(+)
> 
> Do we really have binutils that don't have tlbivax properly at this  
> point?

I don't know for sure, I like being consistent with the rest though
and so I use those macros for all those MMU opcodes. Also means that
I have no problem building with my current toolchain without passing
a specific -mcpu option or anything like that :-)

We can change that back later if you want.

Cheers,
Ben.

Re: [PATCH 4/20] powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.

[Kumar Gala]

On Jul 23, 2009, at 5:12 PM, Benjamin Herrenschmidt wrote:

> On Thu, 2009-07-23 at 10:55 -0500, Kumar Gala wrote:
>> On Jul 23, 2009, at 12:59 AM, Benjamin Herrenschmidt wrote:
>>
>>> This adds the opcode definitions to ppc-opcode.h for the two
>>> instructions
>>> tlbivax and tlbsrx. as defined by Book3E 2.06
>>>
>>> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>>> ---
>>>
>>> arch/powerpc/include/asm/ppc-opcode.h |    6 ++++++
>>> 1 file changed, 6 insertions(+)
>>
>> Do we really have binutils that don't have tlbivax properly at this
>> point?
>
> I don't know for sure, I like being consistent with the rest though
> and so I use those macros for all those MMU opcodes. Also means that
> I have no problem building with my current toolchain without passing
> a specific -mcpu option or anything like that :-)
>
> We can change that back later if you want.

ok, just wondering.. at some point we should decide which way we want  
to go, since we use "tlbivax" today on e500/fsl-booke.

- k

[PATCH 0/20] powerpc: base 64-bit Book3E processor support (v2)

[Benjamin Herrenschmidt]

Here is a series of patches that implement some basic support
for 64-bit Book3E processors that comply to architecture 2.06.

There is no specific processor announced yet. The patches make
some shortcut which means they currently rely on an implementation
that supports MMU v2 with support for the "HES" feature (HW entry
select) and with support for the "TLB reservation" feature. They
also assume a single unified TLB array. I shouldn't be very hard
to implement support for other variants of the architecture on
top of this though.

The current set of patch has no proper support yet for hugetlb,
nor for "special" interrupt levels (debug, critical and machine
check). Some minimal support for debug/critical levels is provided
specifically for the "Debug" interrupt (single step etc...) only
when it occurs from within user space code. 

The intend is to merge these in 2.6.32. They rely on pretty much
all the other patches I've been posting lately including the
generic changes to add the virtual address argument to pte_free_tlb.

v2. Various fixes, some addressing comments recieved and a whole
bunch fixing other issues including breakage of existing platforms

[PATCH 4/20] powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.

[Benjamin Herrenschmidt]

This adds the opcode definitions to ppc-opcode.h for the two instructions
tlbivax and tlbsrx. as defined by Book3E 2.06

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---

 arch/powerpc/include/asm/ppc-opcode.h |    6 ++++++
 1 file changed, 6 insertions(+)

--- linux-work.orig/arch/powerpc/include/asm/ppc-opcode.h	2009-07-22 15:25:45.000000000 +1000
+++ linux-work/arch/powerpc/include/asm/ppc-opcode.h	2009-07-22 15:26:05.000000000 +1000
@@ -48,6 +48,8 @@
 #define PPC_INST_TLBIE			0x7c000264
 #define PPC_INST_TLBILX			0x7c000024
 #define PPC_INST_WAIT			0x7c00007c
+#define PPC_INST_TLBIVAX		0x7c000624
+#define PPC_INST_TLBSRX_DOT		0x7c0006a5
 
 /* macros to insert fields into opcodes */
 #define __PPC_RA(a)	(((a) & 0x1f) << 16)
@@ -76,6 +78,10 @@
 					__PPC_WC(w))
 #define PPC_TLBIE(lp,a) 	stringify_in_c(.long PPC_INST_TLBIE | \
 					       __PPC_RB(a) | __PPC_RS(lp))
+#define PPC_TLBSRX_DOT(a,b)	stringify_in_c(.long PPC_INST_TLBSRX_DOT | \
+					__PPC_RA(a) | __PPC_RB(b))
+#define PPC_TLBIVAX(a,b)	stringify_in_c(.long PPC_INST_TLBIVAX | \
+					__PPC_RA(a) | __PPC_RB(b))
 
 /*
  * Define what the VSX XX1 form instructions will look like, then add