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* [PATCH 1/3] eLBC NAND: increase bus timeout to maximum
@ 2009-11-13 20:12 Scott Wood
  2009-11-23 14:36 ` Artem Bityutskiy
  0 siblings, 1 reply; 2+ messages in thread
From: Scott Wood @ 2009-11-13 20:12 UTC (permalink / raw)
  To: dwmw2; +Cc: linuxppc-dev, linux-mtd

When a NAND operation is in progress, all other localbus operations
(including NOR flash) will have to wait for access to the bus.  However, the
NAND operation may take longer to complete than the default timeout.  Thus,
if NOR is accessed while a NAND operation is in progress, the NAND operation
will fail.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 drivers/mtd/nand/fsl_elbc_nand.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index ddd37d2..58db278 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -946,6 +946,13 @@ static int __devinit fsl_elbc_ctrl_init(struct fsl_elbc_ctrl *ctrl)
 {
 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
 
+	/*
+	 * NAND transactions can tie up the bus for a long time, so set the
+	 * bus timeout to max by clearing LBCR[BMT] (highest base counter
+	 * value) and setting LBCR[BMTPS] to the highest prescaler value.
+	 */
+	clrsetbits_be32(&lbc->lbcr, LBCR_BMT, 15);
+
 	/* clear event registers */
 	setbits32(&lbc->ltesr, LTESR_NAND_MASK);
 	out_be32(&lbc->lteatr, 0);
-- 
1.6.4.4

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH 1/3] eLBC NAND: increase bus timeout to maximum
  2009-11-13 20:12 [PATCH 1/3] eLBC NAND: increase bus timeout to maximum Scott Wood
@ 2009-11-23 14:36 ` Artem Bityutskiy
  0 siblings, 0 replies; 2+ messages in thread
From: Artem Bityutskiy @ 2009-11-23 14:36 UTC (permalink / raw)
  To: Scott Wood; +Cc: linuxppc-dev, dwmw2, linux-mtd

On Fri, 2009-11-13 at 14:12 -0600, Scott Wood wrote:
> When a NAND operation is in progress, all other localbus operations
> (including NOR flash) will have to wait for access to the bus.  However, the
> NAND operation may take longer to complete than the default timeout.  Thus,
> if NOR is accessed while a NAND operation is in progress, the NAND operation
> will fail.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>

Taken the patches to my l2-mtd-2.6 tree.

-- 
Best Regards,
Artem Bityutskiy (Артём Битюцкий)

^ permalink raw reply	[flat|nested] 2+ messages in thread

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