[PATCH 0/2 v3] mpc5200 ac97 gpio reset

[PATCH 0/2 v3] mpc5200 ac97 gpio reset

[Eric Millbrandt]

These patches reimplement the reset fuction in the ac97 to use gpio pins
instead of using the mpc5200 ac97 reset functionality in the psc.  This
avoids a problem in which attached ac97 devices go into "test" mode appear
unresponsive.

These patches were tested on a pcm030 baseboard and on custom hardware with
a wm9715 audio codec/touchscreen controller.

Eric Millbrandt

---

changes since v1
- Refactored to manipulate port_config and gpio pins internally instead of
  exporting an API.
- Amended commit message with comments from Mark Brown
- Refactored to move the port_config manipulation to platform code.
- Remove the gpio pins from the device-tree

changes since v2
- Factored out gpiolib calls, write to the gpio registers directly
- Remove redundant checks around call to mpc5200_psc_ac97_gpio_reset()

Eric Millbrandt (2):
    powerpc/5200: add mpc5200_psc_ac97_gpio_reset
    sound/soc: mpc5200_psc_ac97: Use gpio pins for cold reset

 arch/powerpc/include/asm/mpc52xx.h           |    1 +
 arch/powerpc/include/asm/mpc52xx_psc.h       |    1 +
 arch/powerpc/platforms/52xx/mpc52xx_common.c |  113 ++++++++++++++++++++++=
++++
 sound/soc/fsl/mpc5200_psc_ac97.c             |   22 ++++-
 4 files changed, 133 insertions(+), 4 deletions(-)

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-and copy this message.-


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he reader of this message is not the intended recipient, you are hereby not=
ified that any dissemination, distribution or copying of this communication=
 is strictly prohibited. If you have received this communication in error, =
please immediately notify the sender and destroy the original message.

Thank you.

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[PATCH 1/2 v3] powerpc/5200: add mpc5200_psc_ac97_gpio_reset

[Eric Millbrandt]

Work around a silicon bug in the ac97 reset functionality of the
mpc5200(b).  The implementation of the ac97 "cold" reset is flawed.
If the sync and output lines are high when reset is asserted the
attached ac97 device may go into test mode.  Avoid this by
reconfiguring the psc to gpio mode and generating the reset manually.

>From MPC5200B User's Manual:
"Some AC97 devices goes to a test mode, if the Sync line is high
during the Res line is low (reset phase). To avoid this behavior the
Sync line must be also forced to zero during the reset phase. To do
that, the pin muxing should switch to GPIO mode and the GPIO control
register should be used to control the output lines."

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
---

changes since v1
- Refactored to manipulate port_config and gpio pins internally instead of
  exporting an API.

changes since v2
- Factored out gpiolib calls, write to the gpio registers directly

 arch/powerpc/include/asm/mpc52xx.h           |    1 +
 arch/powerpc/include/asm/mpc52xx_psc.h       |    1 +
 arch/powerpc/platforms/52xx/mpc52xx_common.c |  113 ++++++++++++++++++++++=
++++
 3 files changed, 115 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/=
mpc52xx.h
index b664ce7..1f41382 100644
--- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -271,6 +271,7 @@ struct mpc52xx_intr {
 /* mpc52xx_common.c */
 extern void mpc5200_setup_xlb_arbiter(void);
 extern void mpc52xx_declare_of_platform_devices(void);
+extern int mpc5200_psc_ac97_gpio_reset(int psc_number);
 extern void mpc52xx_map_common_devices(void);
 extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv);
 extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node);
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/=
asm/mpc52xx_psc.h
index ecc4fc6..2966df6 100644
--- a/arch/powerpc/include/asm/mpc52xx_psc.h
+++ b/arch/powerpc/include/asm/mpc52xx_psc.h
@@ -131,6 +131,7 @@
 #define MPC52xx_PSC_SICR_SIM_FIR               (0x6 << 24)
 #define MPC52xx_PSC_SICR_SIM_CODEC_24          (0x7 << 24)
 #define MPC52xx_PSC_SICR_SIM_CODEC_32          (0xf << 24)
+#define MPC52xx_PSC_SICR_ACRB                  (0x8 << 24)
 #define MPC52xx_PSC_SICR_AWR                   (1 << 30)
 #define MPC52xx_PSC_SICR_GENCLK                        (1 << 23)
 #define MPC52xx_PSC_SICR_I2S                   (1 << 22)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/pl=
atforms/52xx/mpc52xx_common.c
index a46bad0..116d461 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -12,9 +12,11 @@

 #undef DEBUG

+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
 #include <linux/of_platform.h>
+#include <linux/of_gpio.h>
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/mpc52xx.h>
@@ -82,6 +84,14 @@ mpc5200_setup_xlb_arbiter(void)
        iounmap(xlb);
 }

+/*
+ * This variable is mapped in mpc52xx_map_common_devices and
+ * used in mpc5200_psc_ac97_gpio_reset().
+ */
+static DEFINE_SPINLOCK(gpio_lock);
+struct mpc52xx_gpio __iomem *simple_gpio;
+struct mpc52xx_gpio_wkup __iomem *wkup_gpio;
+
 /**
  * mpc52xx_declare_of_platform_devices: register internal devices and chil=
dren
  *                                     of the localplus bus to the of_plat=
form
@@ -109,6 +119,19 @@ static struct of_device_id mpc52xx_cdm_ids[] __initdat=
a =3D {
        { .compatible =3D "mpc5200-cdm", }, /* old */
        {}
 };
+static const struct of_device_id mpc52xx_gpio_simple[] =3D {
+       {
+               .compatible =3D "fsl,mpc5200-gpio",
+       },
+       {}
+};
+static const struct of_device_id mpc52xx_gpio_wkup[] =3D {
+       {
+               .compatible =3D "fsl,mpc5200-gpio-wkup",
+       },
+       {}
+};
+

 /**
  * mpc52xx_map_common_devices: iomap devices required by common code
@@ -135,6 +158,16 @@ mpc52xx_map_common_devices(void)
        np =3D of_find_matching_node(NULL, mpc52xx_cdm_ids);
        mpc52xx_cdm =3D of_iomap(np, 0);
        of_node_put(np);
+
+       /* simple_gpio registers */
+       np =3D of_find_matching_node(NULL, mpc52xx_gpio_simple);
+       simple_gpio =3D of_iomap(np, 0);
+       of_node_put(np);
+
+       /* wkup_gpio registers */
+       np =3D of_find_matching_node(NULL, mpc52xx_gpio_wkup);
+       wkup_gpio =3D of_iomap(np, 0);
+       of_node_put(np);
 }

 /**
@@ -233,3 +266,83 @@ mpc52xx_restart(char *cmd)

        while (1);
 }
+
+#define PSC1_RESET     0x1
+#define PSC1_SYNC      0x4
+#define PSC1_SDATA_OUT 0x1
+#define PSC2_RESET     0x2
+#define PSC2_SYNC      (0x4<<4)
+#define PSC2_SDATA_OUT (0x1<<4)
+#define MPC52xx_GPIO_PSC1_MASK 0x7
+#define MPC52xx_GPIO_PSC2_MASK (0x7<<4)
+
+/**
+ * mpc5200_psc_ac97_gpio_reset: Use gpio pins to reset the ac97 bus
+ *
+ * @psc: psc number to reset (only psc 1 and 2 support ac97)
+ */
+int mpc5200_psc_ac97_gpio_reset(int psc_number)
+{
+       unsigned long flags;
+       u32 gpio;
+       u32 mux;
+       int out;
+       int reset;
+       int sync;
+
+       if ((!simple_gpio) || (!wkup_gpio))
+               return -ENODEV;
+
+       switch (psc_number) {
+       case 0:
+               reset   =3D PSC1_RESET;           /* AC97_1_RES */
+               sync    =3D PSC1_SYNC;            /* AC97_1_SYNC */
+               out     =3D PSC1_SDATA_OUT;       /* AC97_1_SDATA_OUT */
+               gpio    =3D MPC52xx_GPIO_PSC1_MASK;
+               break;
+       case 1:
+               reset   =3D PSC2_RESET;           /* AC97_2_RES */
+               sync    =3D PSC2_SYNC;            /* AC97_2_SYNC */
+               out     =3D PSC2_SDATA_OUT;       /* AC97_2_SDATA_OUT */
+               gpio    =3D MPC52xx_GPIO_PSC2_MASK;
+               break;
+       default:
+               printk(KERN_ERR __FILE__ ": "
+                     "Unable to determine PSC, no ac97 cold-reset will be =
"
+                     "performed\n");
+               return -ENODEV;
+       }
+
+       spin_lock_irqsave(&gpio_lock, flags);
+
+       mux =3D in_be32(&simple_gpio->port_config);
+
+       /* Reconfiure pin-muxing to gpio */
+       out_be32(&simple_gpio->port_config, mux & (~gpio));
+
+       /* enable gpio pins for output */
+       setbits8(&wkup_gpio->wkup_gpioe, reset);
+       setbits32(&simple_gpio->simple_gpioe, sync | out);
+
+       setbits8(&wkup_gpio->wkup_ddr, reset);
+       setbits32(&simple_gpio->simple_ddr, sync | out);
+
+       /* Assert cold reset */
+       setbits32(&simple_gpio->simple_dvo, sync | out);
+       setbits8(&wkup_gpio->wkup_dvo, reset);
+
+       /* wait at lease 1 us */
+       udelay(2);
+
+       /* Deassert reset */
+       clrbits8(&wkup_gpio->wkup_dvo, reset);
+       clrbits32(&simple_gpio->simple_dvo, sync | out);
+
+       /* Restore pin-muxing */
+       out_be32(&simple_gpio->port_config, mux);
+
+       spin_unlock_irqrestore(&gpio_lock, flags);
+
+       return 0;
+}
+EXPORT_SYMBOL(mpc5200_psc_ac97_gpio_reset);
--
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-to a public e-mail mailing list I hereby grant permission to distribute-
-and copy this message.-

1.6.3.1


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 intended to be a confidential communication only to the person or entity t=
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he reader of this message is not the intended recipient, you are hereby not=
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Thank you.

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[PATCH 2/2 v4] sound/soc: mpc5200_psc_ac97: Use gpio pins for cold reset

[Eric Millbrandt]

Call the gpio reset platform function instead of using the flawed
ac97 functionality of the MPC5200(b)

>From MPC5200B User's Manual:
"Some AC97 devices goes to a test mode, if the Sync line is high
during the Res line is low (reset phase). To avoid this behavior the
Sync line must be also forced to zero during the reset phase. To do
that, the pin muxing should switch to GPIO mode and the GPIO control
register should be used to control the output lines."

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
---

changes since v1
- Amended with comments from Mark Brown
- Fall back to the original reset implementation if no gpio pins are define=
d
  in the device tree

changes since v2
- Refactored to move the port_config manipulation to platform code.
- Remove the gpio pins from the device-tree

changes since v3
- Remove redundant checks around call to mpc5200_psc_ac97_gpio_reset()

 sound/soc/fsl/mpc5200_psc_ac97.c |   22 ++++++++++++++++++----
 1 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/sound/soc/fsl/mpc5200_psc_ac97.c b/sound/soc/fsl/mpc5200_psc_a=
c97.c
index e2ee220..e7f5d50 100644
--- a/sound/soc/fsl/mpc5200_psc_ac97.c
+++ b/sound/soc/fsl/mpc5200_psc_ac97.c
@@ -20,6 +20,7 @@

 #include <asm/time.h>
 #include <asm/delay.h>
+#include <asm/mpc52xx.h>
 #include <asm/mpc52xx_psc.h>

 #include "mpc5200_dma.h"
@@ -100,19 +101,32 @@ static void psc_ac97_warm_reset(struct snd_ac97 *ac97=
)
 {
        struct mpc52xx_psc __iomem *regs =3D psc_dma->psc_regs;

+       mutex_lock(&psc_dma->mutex);
+
        out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
        udelay(3);
        out_be32(&regs->sicr, psc_dma->sicr);
+
+       mutex_unlock(&psc_dma->mutex);
 }

 static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
 {
        struct mpc52xx_psc __iomem *regs =3D psc_dma->psc_regs;

-       /* Do a cold reset */
-       out_8(&regs->op1, MPC52xx_PSC_OP_RES);
-       udelay(10);
-       out_8(&regs->op0, MPC52xx_PSC_OP_RES);
+       mutex_lock(&psc_dma->mutex);
+       dev_dbg(psc_dma->dev, "cold reset\n");
+
+       mpc5200_psc_ac97_gpio_reset(psc_dma->id);
+
+       /* Notify the PSC that a reset has occurred */
+       out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
+
+       /* Re-enable RX and TX */
+       out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE=
);
+
+       mutex_unlock(&psc_dma->mutex);
+
        msleep(1);
        psc_ac97_warm_reset(ac97);
 }
--
-DISCLAIMER: an automatically appended disclaimer may follow. By posting-
-to a public e-mail mailing list I hereby grant permission to distribute-
-and copy this message.-

1.6.3.1


This e-mail and the information, including any attachments, it contains are=
 intended to be a confidential communication only to the person or entity t=
o whom it is addressed and may contain information that is privileged. If t=
he reader of this message is not the intended recipient, you are hereby not=
ified that any dissemination, distribution or copying of this communication=
 is strictly prohibited. If you have received this communication in error, =
please immediately notify the sender and destroy the original message.

Thank you.

Please consider the environment before printing this email.

[PATCH 1/2 v4] powerpc/5200: add mpc5200_psc_ac97_gpio_reset

[Eric Millbrandt]

Work around a silicon bug in the ac97 reset functionality of the
mpc5200(b).  The implementation of the ac97 "cold" reset is flawed.
If the sync and output lines are high when reset is asserted the
attached ac97 device may go into test mode.  Avoid this by
reconfiguring the psc to gpio mode and generating the reset manually.

>From MPC5200B User's Manual:
"Some AC97 devices goes to a test mode, if the Sync line is high
during the Res line is low (reset phase). To avoid this behavior the
Sync line must be also forced to zero during the reset phase. To do
that, the pin muxing should switch to GPIO mode and the GPIO control
register should be used to control the output lines."

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
---

changes since v1
- Amended with comments from Mark Brown
- Fall back to the original reset implementation if no gpio pins are define=
d
  in the device tree

changes since v2
- Refactored to move the port_config manipulation to platform code.
- Remove the gpio pins from the device-tree

changes since v3
- Remove redundant checks around call to mpc5200_psc_ac97_gpio_reset()

changes since v4
- cleanup inverted logic

 arch/powerpc/include/asm/mpc52xx.h           |    1 +
 arch/powerpc/include/asm/mpc52xx_psc.h       |    1 +
 arch/powerpc/platforms/52xx/mpc52xx_common.c |  111 ++++++++++++++++++++++=
++++
 3 files changed, 113 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/=
mpc52xx.h
index b664ce7..1f41382 100644
--- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -271,6 +271,7 @@ struct mpc52xx_intr {
 /* mpc52xx_common.c */
 extern void mpc5200_setup_xlb_arbiter(void);
 extern void mpc52xx_declare_of_platform_devices(void);
+extern int mpc5200_psc_ac97_gpio_reset(int psc_number);
 extern void mpc52xx_map_common_devices(void);
 extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv);
 extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node);
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/=
asm/mpc52xx_psc.h
index ecc4fc6..2966df6 100644
--- a/arch/powerpc/include/asm/mpc52xx_psc.h
+++ b/arch/powerpc/include/asm/mpc52xx_psc.h
@@ -131,6 +131,7 @@
 #define MPC52xx_PSC_SICR_SIM_FIR               (0x6 << 24)
 #define MPC52xx_PSC_SICR_SIM_CODEC_24          (0x7 << 24)
 #define MPC52xx_PSC_SICR_SIM_CODEC_32          (0xf << 24)
+#define MPC52xx_PSC_SICR_ACRB                  (0x8 << 24)
 #define MPC52xx_PSC_SICR_AWR                   (1 << 30)
 #define MPC52xx_PSC_SICR_GENCLK                        (1 << 23)
 #define MPC52xx_PSC_SICR_I2S                   (1 << 22)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/pl=
atforms/52xx/mpc52xx_common.c
index a46bad0..1887872 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -12,9 +12,11 @@

 #undef DEBUG

+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
 #include <linux/of_platform.h>
+#include <linux/of_gpio.h>
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/mpc52xx.h>
@@ -82,6 +84,14 @@ mpc5200_setup_xlb_arbiter(void)
        iounmap(xlb);
 }

+/*
+ * This variable is mapped in mpc52xx_map_common_devices and
+ * used in mpc5200_psc_ac97_gpio_reset().
+ */
+static DEFINE_SPINLOCK(gpio_lock);
+struct mpc52xx_gpio __iomem *simple_gpio;
+struct mpc52xx_gpio_wkup __iomem *wkup_gpio;
+
 /**
  * mpc52xx_declare_of_platform_devices: register internal devices and chil=
dren
  *                                     of the localplus bus to the of_plat=
form
@@ -109,6 +119,19 @@ static struct of_device_id mpc52xx_cdm_ids[] __initdat=
a =3D {
        { .compatible =3D "mpc5200-cdm", }, /* old */
        {}
 };
+static const struct of_device_id mpc52xx_gpio_simple[] =3D {
+       {
+               .compatible =3D "fsl,mpc5200-gpio",
+       },
+       {}
+};
+static const struct of_device_id mpc52xx_gpio_wkup[] =3D {
+       {
+               .compatible =3D "fsl,mpc5200-gpio-wkup",
+       },
+       {}
+};
+

 /**
  * mpc52xx_map_common_devices: iomap devices required by common code
@@ -135,6 +158,16 @@ mpc52xx_map_common_devices(void)
        np =3D of_find_matching_node(NULL, mpc52xx_cdm_ids);
        mpc52xx_cdm =3D of_iomap(np, 0);
        of_node_put(np);
+
+       /* simple_gpio registers */
+       np =3D of_find_matching_node(NULL, mpc52xx_gpio_simple);
+       simple_gpio =3D of_iomap(np, 0);
+       of_node_put(np);
+
+       /* wkup_gpio registers */
+       np =3D of_find_matching_node(NULL, mpc52xx_gpio_wkup);
+       wkup_gpio =3D of_iomap(np, 0);
+       of_node_put(np);
 }

 /**
@@ -233,3 +266,81 @@ mpc52xx_restart(char *cmd)

        while (1);
 }
+
+#define PSC1_RESET     0x1
+#define PSC1_SYNC      0x4
+#define PSC1_SDATA_OUT 0x1
+#define PSC2_RESET     0x2
+#define PSC2_SYNC      (0x4<<4)
+#define PSC2_SDATA_OUT (0x1<<4)
+#define MPC52xx_GPIO_PSC1_MASK 0x7
+#define MPC52xx_GPIO_PSC2_MASK (0x7<<4)
+
+/**
+ * mpc5200_psc_ac97_gpio_reset: Use gpio pins to reset the ac97 bus
+ *
+ * @psc: psc number to reset (only psc 1 and 2 support ac97)
+ */
+int mpc5200_psc_ac97_gpio_reset(int psc_number)
+{
+       unsigned long flags;
+       u32 gpio;
+       u32 mux;
+       int out;
+       int reset;
+       int sync;
+
+       if ((!simple_gpio) || (!wkup_gpio))
+               return -ENODEV;
+
+       switch (psc_number) {
+       case 0:
+               reset   =3D PSC1_RESET;           /* AC97_1_RES */
+               sync    =3D PSC1_SYNC;            /* AC97_1_SYNC */
+               out     =3D PSC1_SDATA_OUT;       /* AC97_1_SDATA_OUT */
+               gpio    =3D MPC52xx_GPIO_PSC1_MASK;
+               break;
+       case 1:
+               reset   =3D PSC2_RESET;           /* AC97_2_RES */
+               sync    =3D PSC2_SYNC;            /* AC97_2_SYNC */
+               out     =3D PSC2_SDATA_OUT;       /* AC97_2_SDATA_OUT */
+               gpio    =3D MPC52xx_GPIO_PSC2_MASK;
+               break;
+       default:
+               printk(KERN_ERR __FILE__ ": "
+                     "Unable to determine PSC, no ac97 cold-reset will be =
"
+                     "performed\n");
+               return -ENODEV;
+       }
+
+       spin_lock_irqsave(&gpio_lock, flags);
+
+       /* Reconfiure pin-muxing to gpio */
+       mux =3D in_be32(&simple_gpio->port_config);
+       out_be32(&simple_gpio->port_config, mux & (~gpio));
+
+       /* enable gpio pins for output */
+       setbits8(&wkup_gpio->wkup_gpioe, reset);
+       setbits32(&simple_gpio->simple_gpioe, sync | out);
+
+       setbits8(&wkup_gpio->wkup_ddr, reset);
+       setbits32(&simple_gpio->simple_ddr, sync | out);
+
+       /* Assert cold reset */
+       clrbits32(&simple_gpio->simple_dvo, sync | out);
+       clrbits8(&wkup_gpio->wkup_dvo, reset);
+
+       /* wait at lease 1 us */
+       udelay(2);
+
+       /* Deassert reset */
+       setbits8(&wkup_gpio->wkup_dvo, reset);
+
+       /* Restore pin-muxing */
+       out_be32(&simple_gpio->port_config, mux);
+
+       spin_unlock_irqrestore(&gpio_lock, flags);
+
+       return 0;
+}
+EXPORT_SYMBOL(mpc5200_psc_ac97_gpio_reset);
--
-DISCLAIMER: an automatically appended disclaimer may follow. By posting-
-to a public e-mail mailing list I hereby grant permission to distribute-
-and copy this message.-

1.6.3.1


This e-mail and the information, including any attachments, it contains are=
 intended to be a confidential communication only to the person or entity t=
o whom it is addressed and may contain information that is privileged. If t=
he reader of this message is not the intended recipient, you are hereby not=
ified that any dissemination, distribution or copying of this communication=
 is strictly prohibited. If you have received this communication in error, =
please immediately notify the sender and destroy the original message.

Thank you.

Please consider the environment before printing this email.

Re: [PATCH 0/2 v3] mpc5200 ac97 gpio reset

[Mark Brown]

On Tue, Jun 15, 2010 at 12:05:05PM -0400, Eric Millbrandt wrote:
> These patches reimplement the reset fuction in the ac97 to use gpio pins
> instead of using the mpc5200 ac97 reset functionality in the psc.  This
> avoids a problem in which attached ac97 devices go into "test" mode appear
> unresponsive.
> 
> These patches were tested on a pcm030 baseboard and on custom hardware with
> a wm9715 audio codec/touchscreen controller.

Grant, are you OK with this series?

Re: [PATCH 0/2 v3] mpc5200 ac97 gpio reset

[Grant Likely]

On Tue, Jun 22, 2010 at 5:00 PM, Mark Brown
<broonie@opensource.wolfsonmicro.com> wrote:
> On Tue, Jun 15, 2010 at 12:05:05PM -0400, Eric Millbrandt wrote:
>> These patches reimplement the reset fuction in the ac97 to use gpio pins
>> instead of using the mpc5200 ac97 reset functionality in the psc. =A0Thi=
s
>> avoids a problem in which attached ac97 devices go into "test" mode appe=
ar
>> unresponsive.
>>
>> These patches were tested on a pcm030 baseboard and on custom hardware w=
ith
>> a wm9715 audio codec/touchscreen controller.
>
> Grant, are you OK with this series?

Yes, I'm going to pick it up.

g.

Re: [PATCH 0/2 v3] mpc5200 ac97 gpio reset

[Mark Brown]

On 26 Jun 2010, at 00:04, Grant Likely <grant.likely@secretlab.ca> =
wrote:

> On Tue, Jun 22, 2010 at 5:00 PM, Mark Brown
>> On Tue, Jun 15, 2010 at 12:05:05PM -0400, Eric Millbrandt wrote:
>>> These patches reimplement the reset fuction in the ac97 to use gpio =
pins
>>> instead of using the mpc5200 ac97 reset functionality in the psc.  =
This
>>> avoids a problem in which attached ac97 devices go into "test" mode =
appear
>>> unresponsive.
>>>=20
>>> These patches were tested on a pcm030 baseboard and on custom =
hardware with
>>> a wm9715 audio codec/touchscreen controller.
>>=20
>> Grant, are you OK with this series?
>=20
> Yes, I'm going to pick it up.

I'm a little concerned with a collision with multi codec here. It'd
be handy if you could keep it separate in case it needs merging
into both trees (or we could merge via ASoC only).=

Re: [PATCH 0/2 v3] mpc5200 ac97 gpio reset

[Grant Likely]

On Sun, Jun 27, 2010 at 4:01 PM, Mark Brown
<broonie@opensource.wolfsonmicro.com> wrote:
>
> On 26 Jun 2010, at 00:04, Grant Likely <grant.likely@secretlab.ca> wrote:
>
>> On Tue, Jun 22, 2010 at 5:00 PM, Mark Brown
>>> On Tue, Jun 15, 2010 at 12:05:05PM -0400, Eric Millbrandt wrote:
>>>> These patches reimplement the reset fuction in the ac97 to use gpio pi=
ns
>>>> instead of using the mpc5200 ac97 reset functionality in the psc. =A0T=
his
>>>> avoids a problem in which attached ac97 devices go into "test" mode ap=
pear
>>>> unresponsive.
>>>>
>>>> These patches were tested on a pcm030 baseboard and on custom hardware=
 with
>>>> a wm9715 audio codec/touchscreen controller.
>>>
>>> Grant, are you OK with this series?
>>
>> Yes, I'm going to pick it up.
>
> I'm a little concerned with a collision with multi codec here. It'd
> be handy if you could keep it separate in case it needs merging
> into both trees (or we could merge via ASoC only).

Hmmm.  Yeah, probably better to take it via your tree then.  I've
currently got patch 1 in linux-next, but I'll drop it before asking
benh to pull.  Go ahead and add my acked-by.

g.

--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: [PATCH 0/2 v3] mpc5200 ac97 gpio reset

[Mark Brown]

On Sat, Jul 31, 2010 at 10:42:15PM -0600, Grant Likely wrote:
> On Sun, Jun 27, 2010 at 4:01 PM, Mark Brown

> > I'm a little concerned with a collision with multi codec here. It'd
> > be handy if you could keep it separate in case it needs merging
> > into both trees (or we could merge via ASoC only).

> Hmmm.  Yeah, probably better to take it via your tree then.  I've
> currently got patch 1 in linux-next, but I'll drop it before asking
> benh to pull.  Go ahead and add my acked-by.

Looks like multi-component is slightly too late for .36 and I don't have
the original patch any more since it looked like you were going to be
carrying it...  could you restore the patch to your tree please?

RE: [PATCH 0/2 v3] mpc5200 ac97 gpio reset

[Eric Millbrandt]

> -----Original Message-----
> From: linuxppc-dev-bounces+emillbrandt=3Ddekaresearch.com@lists.ozlabs.or=
g
> [mailto:linuxppc-dev-
> bounces+emillbrandt=3Ddekaresearch.com@lists.ozlabs.org] On Behalf Of Mar=
k
> Brown
> Sent: Tuesday, August 03, 2010 01:52
> To: Grant Likely
> Cc: linuxppc-dev@lists.ozlabs.org; Eric Millbrandt
> Subject: Re: [PATCH 0/2 v3] mpc5200 ac97 gpio reset
>
> On Sat, Jul 31, 2010 at 10:42:15PM -0600, Grant Likely wrote:
> > On Sun, Jun 27, 2010 at 4:01 PM, Mark Brown
>
> > > I'm a little concerned with a collision with multi codec here. It'd
> > > be handy if you could keep it separate in case it needs merging
> > > into both trees (or we could merge via ASoC only).
>
> > Hmmm.  Yeah, probably better to take it via your tree then.  I've
> > currently got patch 1 in linux-next, but I'll drop it before asking
> > benh to pull.  Go ahead and add my acked-by.
>
> Looks like multi-component is slightly too late for .36 and I don't have
> the original patch any more since it looked like you were going to be
> carrying it...  could you restore the patch to your tree please?

<ping> Grant, are you going to pick up this series for .36?

Eric

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Re: [PATCH 0/2 v3] mpc5200 ac97 gpio reset

[Grant Likely]

On Thu, Aug 5, 2010 at 6:59 AM, Eric Millbrandt
<emillbrandt@dekaresearch.com> wrote:
>> -----Original Message-----
>> From: linuxppc-dev-bounces+emillbrandt=3Ddekaresearch.com@lists.ozlabs.o=
rg
>> [mailto:linuxppc-dev-
>> bounces+emillbrandt=3Ddekaresearch.com@lists.ozlabs.org] On Behalf Of Ma=
rk
>> Brown
>> Sent: Tuesday, August 03, 2010 01:52
>> To: Grant Likely
>> Cc: linuxppc-dev@lists.ozlabs.org; Eric Millbrandt
>> Subject: Re: [PATCH 0/2 v3] mpc5200 ac97 gpio reset
>>
>> On Sat, Jul 31, 2010 at 10:42:15PM -0600, Grant Likely wrote:
>> > On Sun, Jun 27, 2010 at 4:01 PM, Mark Brown
>>
>> > > I'm a little concerned with a collision with multi codec here. It'd
>> > > be handy if you could keep it separate in case it needs merging
>> > > into both trees (or we could merge via ASoC only).
>>
>> > Hmmm. =A0Yeah, probably better to take it via your tree then. =A0I've
>> > currently got patch 1 in linux-next, but I'll drop it before asking
>> > benh to pull. =A0Go ahead and add my acked-by.
>>
>> Looks like multi-component is slightly too late for .36 and I don't have
>> the original patch any more since it looked like you were going to be
>> carrying it... =A0could you restore the patch to your tree please?
>
> <ping> Grant, are you going to pick up this series for .36?

Yes, working on it...  :-)

g.