From: David Miller <davem@davemloft.net>
To: avorontsov@mvista.com
Cc: linuxppc-dev@ozlabs.org, afleming@freescale.com,
Sandeep.Kumar@freescale.com, manfred.rudigier@omicron.at,
netdev@vger.kernel.org
Subject: Re: [PATCH 1/3] gianfar: Implement workaround for eTSEC74 erratum
Date: Wed, 30 Jun 2010 11:37:06 -0700 (PDT) [thread overview]
Message-ID: <20100630.113706.133400770.davem@davemloft.net> (raw)
In-Reply-To: <20100630163804.GA636@oksana.dev.rtsoft.ru>
From: Anton Vorontsov <avorontsov@mvista.com>
Date: Wed, 30 Jun 2010 20:38:04 +0400
> On Tue, Jun 29, 2010 at 03:16:26PM -0700, David Miller wrote:
>>
>> I really don't see any value at all to this config option,
>> the errata fixup code should be there all the time.
>
> Well, at least for eTSEC76 erratum (patch 2/3) we have to touch
> fast path (i.e. start_xmit), so I just wanted to make zero
> overhead for controllers that don't need any fixups.
>
> Not that there's much of the overhead in a single additional
> 'if' condition, no. ;-)
The register accesses will dominate the costs with this chip.
The only case where a if() test is going to potentially create
some practical performance impact is if the TX is performed
purely using changes to a shared memory data structure and
absolutely no MMIO register reads or writes.
prev parent reply other threads:[~2010-06-30 18:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-29 20:59 [PATCH 1/3] gianfar: Implement workaround for eTSEC74 erratum Anton Vorontsov
2010-06-29 22:16 ` David Miller
2010-06-30 16:38 ` Anton Vorontsov
2010-06-30 16:39 ` [PATCH v2 " Anton Vorontsov
2010-06-30 18:37 ` David Miller
2010-06-30 16:39 ` [PATCH v2 2/3] gianfar: Implement workaround for eTSEC76 erratum Anton Vorontsov
2010-06-30 18:37 ` David Miller
2010-06-30 16:39 ` [PATCH v2 3/3] gianfar: Implement workaround for eTSEC-A002 erratum Anton Vorontsov
2010-06-30 18:37 ` David Miller
2010-06-30 18:37 ` David Miller [this message]
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