Re: machine check in kernel for a mpc870 board

[Scott Wood <scottwood@freescale.com>]

On Fri, 2 Jul 2010 10:06:47 -0700
Shawn Jin <shawnxjin@gmail.com> wrote:

> > Or more generally update this section to hold whatever is connected
> > to the localbus on your board. =A0The first cell is the chipselect.
>=20
> The chipselect? Isn't it just the child-bus-addr? BTW, do we have to
> define the #address-cells to 2? 1 is not enough?

The first cell of the child bus address is the chip select, the second
cell is the offset into the chip select.

> SDRAM uses CS0/6, each 64MB. BDI2000 configuration is as follows.
> ; init memory controller
> WM32    0xFA200104      0xfe000ff6      ;;OR0: Flash 32MB
> WM32    0xFA200100      0xfc000001      ;;BR0: Flash at 0xFC000000,
> 32bit, R/W, no parity, use GPCM
> WM32    0xFA20010C      0xfc000e00      ;;OR1: SDRAM 64MB, all
> accesses WM32    0xFA200108      0x00000081      ;;BR1: SDRAM at
> 0x00000000, 32bit, R/W, no parity, use UPMA
> WM32    0xFA200134      0xfc000e00      ;;OR6: SDRAM 64MB, all
> accesses WM32    0xFA200130      0x04000081      ;;BR6: SDRAM at
> 0x04000000, 32bit, R/W, no parity, use UPMA

That looks like SDRAM is on CS1/6, not CS0/6.

We haven't been putting ordinary RAM under the localbus node, even
though it's connected through the localbus on these chips.

> When defining memory's reg property, can a single pair <0 0x08000000>
> be enough? Or must it be <0 0x04000000 0x04000000 0x04000000>?

A single pair is fine.

-Scott