Re: machine check in kernel for a mpc870 board

[Scott Wood <scottwood@freescale.com>]

On Fri, 2 Jul 2010 12:16:11 -0700
Shawn Jin <shawnxjin@gmail.com> wrote:

> >> The chipselect? Isn't it just the child-bus-addr? BTW, do we have
> >> to define the #address-cells to 2? 1 is not enough?
> >
> > The first cell of the child bus address is the chip select, the
> > second cell is the offset into the chip select.
>=20
> I see. So the #address-sells of 2 doesn't necessarily indicate the
> address is 64 bits?

Well, there's 64 bits of data, but it doesn't mean that it's one 64-bit
integer.

> Different processors can interpret it differently?

Different device tree bus types can -- though in this case it translates
to an ordinary CPU address using the standand ranges property.

> Where can I find such info? Is there any doc on this?

Documentation/powerpc/dts-bindings/fsl/lbc.txt

> I have a question on the serial settings. Why does it locate at 0xa80?
> According to MPC885RM.pdf, the SMC1's registers start from 0xa82.=20

I suppose the interpretation was that the register block starts at
0xa80, and the first register within that block is at 0xa82 -- though
the manual seems to actually lump those two reserved bytes in with the
previous section.

> What does the reg property specify here for SMC1, the first set of <0xa80
> 0x10> and the 2nd <0x3e80 0x40>?

=46rom Documentation/powerpc/dts-bindings/fsl/cpm.txt:
> - reg : Unless otherwise specified, the first resource represents the =20
>         scc/fcc/ucc registers, and the second represents the device's
>         parameter RAM region (if it has one).

-Scott