From: Wolfram Sang <w.sang@pengutronix.de>
To: Eric Millbrandt <emillbrandt@dekaresearch.com>
Cc: "linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [PATCH] powerpc/5200: tighten up ac97 reset timing
Date: Fri, 3 Sep 2010 18:49:53 +0200 [thread overview]
Message-ID: <20100903164953.GG4813@pengutronix.de> (raw)
In-Reply-To: <0A40042D85E7C84DB443060EC44B3FD3254AA09E8F@dekaexchange07.deka.local>
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> > Yes, but it is way more readable. Does the extra delay hurt? The value
> > of 7 looks a bit magic to me. Are you sure it will do for various
> > clock frequencies?
> >
>
> The reset is happening in the gpio spinlock, so I am trying to keep busy
> waiting to a minimum. The magic value of 7 calculates to *roughly* 200ns
> with a system timebase of 33mhz. This timebase drives the mpc5200(b) at
> its max clock speed of 400mhz, so slower frequencies should just extend the
> delay, which is acceptable. If you strongly object to the use of __delay
> I can change it to ndelay.
That might be a valid reason, dunno the details here. I'll leave the
final decision for Grant. If the use of __delay is acceptable, the
calculation that led to 7 should be explained, I think.
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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prev parent reply other threads:[~2010-09-03 16:49 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-09-03 15:45 [PATCH] powerpc/5200: tighten up ac97 reset timing Eric Millbrandt
2010-09-03 16:02 ` Wolfram Sang
2010-09-03 16:17 ` Eric Millbrandt
2010-09-03 16:22 ` Wolfram Sang
2010-09-03 16:40 ` Eric Millbrandt
2010-09-03 16:49 ` Wolfram Sang [this message]
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