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Date: Wed, 8 Dec 2010 16:25:59 -0600
From: Scott Wood <scottwood@freescale.com>
To: Mark Mason <mason@postdiluvian.org>
Subject: Re: MPC831x (and others?) NAND erase performance improvements
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On Wed, 8 Dec 2010 17:02:45 -0500
Mark Mason <mason@postdiluvian.org> wrote:

> I don't think that using a software NAND controller instead of the LBC
> FCM mode is all that bad.  Again, I haven't actually done it, so check
> the MTD docs, but I'm pretty sure the software is meant to do that, so
> it doesn't even really constitute a "fix".  Assuming that it is
> supported then I doubt that configuring the NAND layer to use your
> setup would be any harder than configuring the FCM.

The MTD layer supports some really simple NAND controllers, but what do
you mean by not having a controller at all?  Hooking everything up to
GPIO?  Using UPM?

There is already a UPM NAND driver, BTW.

You would lose hardware ECC and the ability to be interrupt-driven (the
latter should be possible with SW changes, using GPIO interrupts).

-Scott