From: Wolfgang Denk <wd@denx.de>
To: tmarri@apm.com
Cc: greg@kroah.com, linux-usb@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v11 03/10] USB/ppc4xx: Add Synopsys DWC OTG Core Interface Layer (CIL)
Date: Fri, 01 Apr 2011 22:00:38 +0200 [thread overview]
Message-ID: <20110401200038.BF323142E074@gemini.denx.de> (raw)
In-Reply-To: <1301684711-17386-1-git-send-email-tmarri@apm.com>
Dear tmarri@apm.com,
In message <1301684711-17386-1-git-send-email-tmarri@apm.com> you wrote:
> From: Tirumala Marri <tmarri@apm.com>
>
> Core Interface Layer Common provides common functions for both host
> controller and peripheral controller. CIL manages the memory map
> for the core. It also handles basic tasks like reading/writing the
> registers and data FIFOs in the controller. CIL performs basic
> services that are not specific to either the host or device modes
> of operation. These services include management of the OTG Host
> Negotiation Protocol (HNP) and Session Request Protocol (SRP).
> ---
Signed-off-by: line missing.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
"No problem is so formidable that you can't walk away from it."
- C. Schulz
prev parent reply other threads:[~2011-04-01 20:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-01 19:05 [PATCH v11 03/10] USB/ppc4xx: Add Synopsys DWC OTG Core Interface Layer (CIL) tmarri
2011-04-01 20:00 ` Wolfgang Denk [this message]
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