From: Willy Tarreau <w@1wt.eu>
To: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Cc: Scott Wood <scottwood@freescale.com>,
linuxppc-dev <linuxppc-dev@ozlabs.org>
Subject: Re: [PATCH 00/15] Backport 8xx TLB to 2.4
Date: Tue, 14 Jun 2011 21:31:06 +0200 [thread overview]
Message-ID: <20110614193106.GA15583@1wt.eu> (raw)
In-Reply-To: <1308059700-10839-1-git-send-email-Joakim.Tjernlund@transmode.se>
Hi Joakim,
On Tue, Jun 14, 2011 at 03:54:45PM +0200, Joakim Tjernlund wrote:
> This is a backport from 2.6 which I did to overcome 8xx CPU
> bugs. 8xx does not update the DAR register when taking a TLB
> error caused by dcbX and icbi insns which makes it very
> tricky to use these insns. Also the dcbst wrongly sets the
> the store bit when faulting into DTLB error.
> A few more bugs very found during development.
>
> I know 2.4 is in strict maintenance mode and 8xx is obsolete
> but as it is still in use I wanted 8xx to age with grace.
OK, I'm not opposed to merge these patches and I really welcome your
work and want to thank you for having done it. However, I have
absolutely *zero* skills on ppc, so I want to ensure that someone
(possibly you) will be able to back me up in case of reported
regressions once these patches are merged. Since you say that the
code works on your board, I'm not much worried but at least Dan's
comment about the risk of performance regression has to be considered.
If we all agree that it's a tradeoff between performance and stability
or security, then that's a different matter of course !
Thanks !
Willy
next prev parent reply other threads:[~2011-06-14 19:47 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-14 13:54 [PATCH 00/15] Backport 8xx TLB to 2.4 Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 01/15] 8xx: Use a macro to simpliy CPU6 errata code Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 02/15] 8xx: Tag DAR with 0x00f0 to catch buggy instructions Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 03/15] 8xx: invalidate non present TLBs Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 04/15] 8xx: Fix CONFIG_PIN_TLB Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 05/15] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 06/15] 8xx: Always pin kernel instruction TLB Joakim Tjernlund
2011-06-14 16:06 ` Dan Malek
2011-06-14 18:00 ` Joakim Tjernlund
2011-06-14 18:11 ` Dan Malek
2011-06-14 18:19 ` Joakim Tjernlund
2011-06-15 9:21 ` Joakim Tjernlund
[not found] ` <OF75A64D65.5ABAA9A9-ONC12578AF.0062124A-C12578AF.0062E416@LocalDomain>
2011-06-15 7:36 ` Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 07/15] 8xx: Fixup DAR from buggy dcbX instructions Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 08/15] 8xx: CPU6 errata make DTLB error too big to fit Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 09/15] 8xx: Add missing Guarded setting in DTLB Error Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 10/15] 8xx: Restore _PAGE_WRITETHRU Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 11/15] 8xx: Set correct HW pte flags in DTLB Error too Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 12/15] 8xx: start using dcbX instructions in various copy routines Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 13/15] 8xx: Use symbolic constants in TLB asm Joakim Tjernlund
2011-06-14 13:54 ` [PATCH 14/15] 8xx: Optimize ITLBMiss handler Joakim Tjernlund
2011-06-14 13:55 ` [PATCH 15/15] 8xx: Optimize TLB Miss handlers Joakim Tjernlund
2011-06-14 16:11 ` [PATCH 00/15] Backport 8xx TLB to 2.4 Dan Malek
2011-06-14 18:10 ` Joakim Tjernlund
2011-06-14 19:31 ` Willy Tarreau [this message]
2011-06-15 7:43 ` Joakim Tjernlund
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