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Date: Tue, 26 Jul 2011 13:20:09 -0500
From: Scott Wood <scottwood@freescale.com>
To: <MichaelHench@gmail.com>
Subject: Re: [PATCH] mtd: eLBC NAND: update ecc_stats.corrected when lteccr
	available
Message-ID: <20110726132009.1fdaf1b7@schlenkerla.am.freescale.net>
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On Tue, 26 Jul 2011 08:45:42 -0500
Michael Hench <michaelhench@gmail.com> wrote:

> update ecc_stats.corrected if LTECCR register is available.
> 
> Signed-off-by: Michael Hench <MichaelHench@gmail.com>
> ---
> diff -purN orig/drivers/mtd/nand/fsl_elbc_nand.c
> linux-3.0/drivers/mtd/nand/fsl_elbc_nand.c
> --- orig/drivers/mtd/nand/fsl_elbc_nand.c	2011-07-25 14:50:56.838326055 -0500
> +++ linux-3.0/drivers/mtd/nand/fsl_elbc_nand.c	2011-07-25
> 14:48:35.680940052 -0500
> @@ -256,6 +256,25 @@ static int fsl_elbc_run_command(struct m
>  		return -EIO;
>  	}
> 
> +	if(chip->ecc.mode != NAND_ECC_HW)
> +		return(0);
> +
> +	if(elbc_fcm_ctrl->read_bytes == mtd->writesize + mtd->oobsize) {
> +		uint32_t lteccr = in_be32(&lbc->lteccr);
> +		/*
> +		 * if command was a full page read and the ELBC
> +		 * has the LTECCR register, then bits 12-15 (ppc order) of
> +		 * LTECCR indicate which 512 byte sub-pages had corrected errors.
> +		 * bits 28-31 are uncorrectable errors, marked elsewhere.
> +		 * for small page nand only 1 bit is used.
> +		 * if the ELBC doesn't have the lteccr register it reads 0
> +		 */
> +		if(lteccr & 0x000F000F)
> +			out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */
> +		if(lteccr & 0x000F0000)
> +			mtd->ecc_stats.corrected++;
> +	}

Add a space after "if" and remove the parentheses in "return(0)", but
otherwise ACK.

-Scott