From: Paul Mackerras <paulus@samba.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org, linux-mm@kvack.org
Subject: Re: [PATCH -V1 09/24] powerpc: Decode the pte-lp-encoding bits correctly.
Date: Tue, 5 Mar 2013 13:02:05 +1100 [thread overview]
Message-ID: <20130305020205.GB2888@iris.ozlabs.ibm.com> (raw)
In-Reply-To: <87y5e31jem.fsf@linux.vnet.ibm.com>
On Mon, Mar 04, 2013 at 05:11:53PM +0530, Aneesh Kumar K.V wrote:
> Paul Mackerras <paulus@samba.org> writes:
> >> +static inline int hpte_actual_psize(struct hash_pte *hptep, int psize)
> >> +{
> >> + unsigned int mask;
> >> + int i, penc, shift;
> >> + /* Look at the 8 bit LP value */
> >> + unsigned int lp = (hptep->r >> LP_SHIFT) & ((1 << LP_BITS) - 1);
> >> +
> >> + penc = 0;
> >> + for (i = 0; i < MMU_PAGE_COUNT; i++) {
> >> + /* valid entries have a shift value */
> >> + if (!mmu_psize_defs[i].shift)
> >> + continue;
> >> +
> >> + /* encoding bits per actual page size */
> >> + shift = mmu_psize_defs[i].shift - 11;
> >> + if (shift > 9)
> >> + shift = 9;
> >> + mask = (1 << shift) - 1;
> >> + if ((lp & mask) == mmu_psize_defs[psize].penc[i])
> >> + return i;
> >> + }
> >> + return -1;
> >> +}
> >
> > This doesn't look right to me. First, it's not clear what the 11 and
> > 9 refer to, and I think the 9 should be LP_BITS (i.e. 8). Secondly,
> > the mask for the comparison needs to depend on the actual page size
> > not the base page size.
>
> That 11 should be 12.That depends on the fact that we have below mapping
And the 12 should be LP_SHIFT, shouldn't it?
> rrrr rrrz ≥8KB
>
> Yes, that 9 should be LP_BITs.
>
> We are generating mask based on actual page size above (variable i in
> the for loop).
OK, yes, you're right.
> > I don't see where in this function you set the penc[] elements for
> > invalid actual page sizes to -1.
>
> We do the below
>
> --- a/arch/powerpc/mm/hash_utils_64.c
> +++ b/arch/powerpc/mm/hash_utils_64.c
> @@ -125,7 +125,7 @@ static struct mmu_psize_def mmu_psize_defaults_old[] = {
> [MMU_PAGE_4K] = {
> .shift = 12,
> .sllp = 0,
> - .penc = 0,
> + .penc = { [0 ... MMU_PAGE_COUNT - 1] = -1 },
> .avpnm = 0,
Yes, which sets them for the entries you initialize, but not for the
others. For example, the entry for MMU_PAGE_64K will initially be all
zeroes. Then we find an entry in the ibm,segment-page-sizes property
for 64k pages, so we set mmu_psize_defs[MMU_PAGE_64K].shift to 16,
making that entry valid, but we never set any of the .penc[] entries
to -1, leading your other code to think that it can do (say) 1M pages
in a 64k segment using an encoding of 0.
Also, I noticed that the code in the if (base_idx < 0) statement is
wrong. It needs to advance prop (and decrease size) by 2 * lpnum,
not just 2.
Paul.
next prev parent reply other threads:[~2013-03-05 2:02 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-26 8:04 [PATCH -V1 00/24] THP support for PPC64 Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 01/24] powerpc: Use signed formatting when printing error Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 02/24] powerpc: Save DAR and DSISR in pt_regs on MCE Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 03/24] powerpc: Don't hard code the size of pte page Aneesh Kumar K.V
2013-02-27 23:09 ` Paul Mackerras
2013-02-26 8:04 ` [PATCH -V1 04/24] powerpc: Reduce the PTE_INDEX_SIZE Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 05/24] powerpc: Move the pte free routines from common header Aneesh Kumar K.V
2013-02-28 8:36 ` Paul Mackerras
2013-02-26 8:04 ` [PATCH -V1 06/24] powerpc: Reduce PTE table memory wastage Aneesh Kumar K.V
2013-03-04 4:58 ` Paul Mackerras
2013-03-04 10:58 ` Aneesh Kumar K.V
2013-03-04 23:36 ` Benjamin Herrenschmidt
2013-03-06 4:01 ` Aneesh Kumar K.V
2013-03-05 2:12 ` Paul Mackerras
2013-03-06 4:08 ` Aneesh Kumar K.V
2013-03-06 5:03 ` Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 07/24] powerpc: Add size argument to pgtable_cache_add Aneesh Kumar K.V
2013-03-04 5:13 ` Paul Mackerras
2013-03-04 11:02 ` Aneesh Kumar K.V
2013-03-05 1:50 ` Paul Mackerras
2013-03-06 4:23 ` Aneesh Kumar K.V
2013-02-26 8:04 ` [PATCH -V1 08/24] powerpc: Use encode avpn where we need only avpn values Aneesh Kumar K.V
2013-03-04 5:15 ` Paul Mackerras
2013-02-26 8:04 ` [PATCH -V1 09/24] powerpc: Decode the pte-lp-encoding bits correctly Aneesh Kumar K.V
2013-03-04 5:48 ` Paul Mackerras
2013-03-04 11:41 ` Aneesh Kumar K.V
2013-03-05 2:02 ` Paul Mackerras [this message]
2013-03-06 4:30 ` Aneesh Kumar K.V
2013-03-04 11:52 ` Aneesh Kumar K.V
2013-03-04 18:11 ` Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 10/24] powerpc: Return all the valid pte ecndoing in KVM_PPC_GET_SMMU_INFO ioctl Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 11/24] powerpc: Update tlbie/tlbiel as per ISA doc Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 12/24] powerpc: print both base and actual page size on hash failure Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 13/24] powerpc: Print page size info during boot Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 14/24] powerpc: Fix hpte_decode to use the correct decoding for page sizes Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 15/24] mm/THP: HPAGE_SHIFT is not a #define on some arch Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 16/24] mm/THP: Add pmd args to pgtable deposit and withdraw APIs Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 17/24] mm/THP: withdraw the pgtable after pmdp related operations Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 18/24] powerpc/THP: Implement transparent huge pages for ppc64 Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 19/24] powerpc/THP: Differentiate THP PMD entries from HUGETLB PMD entries Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 20/24] powerpc/THP: Add code to handle HPTE faults for large pages Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 21/24] powerpc: Handle huge page in perf callchain Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 22/24] powerpc/THP: hypervisor require few WIMG bit set Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 23/24] powerpc/THP: get_user_pages_fast changes Aneesh Kumar K.V
2013-02-26 8:05 ` [PATCH -V1 24/24] powerpc/THP: Enable THP on PPC64 Aneesh Kumar K.V
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130305020205.GB2888@iris.ozlabs.ibm.com \
--to=paulus@samba.org \
--cc=aneesh.kumar@linux.vnet.ibm.com \
--cc=linux-mm@kvack.org \
--cc=linuxppc-dev@lists.ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).