From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.8bytes.org (8bytes.org [85.214.48.195]) by ozlabs.org (Postfix) with ESMTP id E8B9C2C0151 for ; Wed, 3 Apr 2013 02:10:16 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by mail.8bytes.org (Postfix) with SMTP id 9EAED12B085 for ; Tue, 2 Apr 2013 17:10:14 +0200 (CEST) Date: Tue, 2 Apr 2013 17:10:12 +0200 From: Joerg Roedel To: Varun Sethi Subject: Re: [PATCH 4/5 v11] iommu/fsl: Add additional iommu attributes required by the PAMU driver. Message-ID: <20130402151011.GH15687@8bytes.org> References: <1364500442-20927-1-git-send-email-Varun.Sethi@freescale.com> <1364500442-20927-5-git-send-email-Varun.Sethi@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <1364500442-20927-5-git-send-email-Varun.Sethi@freescale.com> Cc: linux-kernel@vger.kernel.org, stuart.yoder@freescale.com, iommu@lists.linux-foundation.org, scottwood@freescale.com, linuxppc-dev@lists.ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Fri, Mar 29, 2013 at 01:24:01AM +0530, Varun Sethi wrote: > +/* cache stash targets */ > +enum stash_target { > + IOMMU_ATTR_CACHE_L1 = 1, > + IOMMU_ATTR_CACHE_L2, > + IOMMU_ATTR_CACHE_L3, > +}; > + > +/* This attribute corresponds to IOMMUs capable of generating > + * a stash transaction. A stash transaction is typically a > + * hardware initiated prefetch of data from memory to cache. > + * This attribute allows configuring stashig specific parameters > + * in the IOMMU hardware. > + */ > + > +struct iommu_stash_attribute { > + u32 cpu; /* cpu number */ > + u32 cache; /* cache to stash to: L1,L2,L3 */ > +}; > + I would prefer these PAMU specific enum and struct to be in a pamu-specific iommu-header. Joerg