From: Gavin Shan <shangw@linux.vnet.ibm.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org, Gavin Shan <shangw@linux.vnet.ibm.com>
Subject: Re: [PATCH 03/10] powerpc/eeh: Check PCIe link after reset
Date: Tue, 25 Jun 2013 16:04:20 +0800 [thread overview]
Message-ID: <20130625080420.GA18470@shangw.(null)> (raw)
In-Reply-To: <1372147064.3944.200.camel@pasglop>
On Tue, Jun 25, 2013 at 05:57:44PM +1000, Benjamin Herrenschmidt wrote:
>On Tue, 2013-06-25 at 15:47 +0800, Gavin Shan wrote:
>> If we just have complete reset for fenced PHB, we need restore it
>> from the cache (edev->config_space[1]) instead of reading that from
>> hardware. Fenced PHB is the special case on PowerNV :-)
>
>Well not really...
>
>In general we can also end up doing a hard reset under pHyp, and bridges
>can lose their state as well, which means they need to be restored from
>cache.
>
>We don't see the real PHB, but we might see the bridges if we have a PE
>that contains a bridge, for example, a PCIe card with a switch on it.
>
>If we hard reset that (because the driver requested it) or if pHyp did a
>reset due to a fence behind the scene, that bridge *will* have lost its
>state and will need to be reconfigured too... or is RTAS doing it all ?
>
Ok. So that would be job of eeh_ops->configure_bridge(). On pSeries, it
should have done with that.
Thanks,
Gavin
next prev parent reply other threads:[~2013-06-25 8:05 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-25 5:55 [PATCH v1 00/10] powerpc/eeh: Remove eeh_mutex Gavin Shan
2013-06-25 5:55 ` [PATCH 01/10] " Gavin Shan
2013-06-25 5:55 ` [PATCH 02/10] powerpc/eeh: Don't collect PCI-CFG data on PHB Gavin Shan
2013-06-25 5:55 ` [PATCH 03/10] powerpc/eeh: Check PCIe link after reset Gavin Shan
2013-06-25 6:06 ` Benjamin Herrenschmidt
2013-06-25 7:47 ` Gavin Shan
2013-06-25 7:57 ` Benjamin Herrenschmidt
2013-06-25 8:04 ` Gavin Shan [this message]
2013-06-25 5:55 ` [PATCH 04/10] powerpc/eeh: Backends to get/set settings Gavin Shan
2013-06-25 6:07 ` Benjamin Herrenschmidt
2013-06-25 7:12 ` Gavin Shan
2013-06-25 5:55 ` [PATCH 05/10] powerpc/powernv: Support set/get EEH settings Gavin Shan
2013-06-25 5:55 ` [PATCH 06/10] powerpc/eeh: Support blocked IO access Gavin Shan
2013-06-25 5:55 ` [PATCH 07/10] powerpc/powernv: Block PCI-CFG access if necessary Gavin Shan
2013-06-25 5:55 ` [PATCH 08/10] powerpc/powernv: Hold PCI-CFG and I/O access Gavin Shan
2013-06-25 5:55 ` [PATCH 09/10] powerpc/eeh: Fix address catch for PowerNV Gavin Shan
2013-06-25 5:55 ` [PATCH 10/10] net/tg3: Avoid delay during MMIO access Gavin Shan
2013-06-25 6:15 ` Benjamin Herrenschmidt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='20130625080420.GA18470@shangw.(null)' \
--to=shangw@linux.vnet.ibm.com \
--cc=benh@kernel.crashing.org \
--cc=linuxppc-dev@lists.ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).