From: Michael Ellerman <michael@ellerman.id.au>
To: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Cc: linuxppc-dev@ozlabs.org, sukadev@linux.vnet.ibm.com,
Paul Mackerras <paulus@samba.org>
Subject: Re: [PATCH 2/8] powerpc/perf: Rework disable logic in pmu_disable()
Date: Wed, 26 Jun 2013 13:28:22 +1000 [thread overview]
Message-ID: <20130626032822.GA10796@concordia> (raw)
In-Reply-To: <51C97D7F.4030405@linux.vnet.ibm.com>
On Tue, Jun 25, 2013 at 04:52:39PM +0530, Anshuman Khandual wrote:
> On 06/24/2013 04:58 PM, Michael Ellerman wrote:
> > In pmu_disable() we disable the PMU by setting the FC (Freeze Counters)
> > bit in MMCR0. In order to do this we have to read/modify/write MMCR0.
> >
> > It's possible that we read a value from MMCR0 which has PMAO (PMU Alert
> > Occurred) set. When we write that value back it will cause an interrupt
> > to occur. We will then end up in the PMU interrupt handler even though
> > we are supposed to have just disabled the PMU.
> >
>
> Is that possible ? First of all MMCR0[PMAO] could not be written by SW.
> Even if you try writing it, how its going to generate PMU interrupt ?
> HW sets this bit MMCR0[PMAO] after a PMU interrupt has already occurred
> not that if we set this, a PMU interrupt would be generated.
Yes it's possible.
cheers
next prev parent reply other threads:[~2013-06-26 3:28 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-24 11:28 [PATCH 1/8] powerpc/perf: Check that events only include valid bits on Power8 Michael Ellerman
2013-06-24 11:28 ` [PATCH 2/8] powerpc/perf: Rework disable logic in pmu_disable() Michael Ellerman
2013-06-25 11:22 ` Anshuman Khandual
2013-06-26 3:28 ` Michael Ellerman [this message]
2013-07-10 0:15 ` Sukadev Bhattiprolu
2013-07-10 2:12 ` Michael Ellerman
2013-06-24 11:28 ` [PATCH 3/8] powerpc/perf: Freeze PMC5/6 if we're not using them Michael Ellerman
2013-06-24 11:28 ` [PATCH 4/8] powerpc/perf: Use existing out label in power_pmu_enable() Michael Ellerman
2013-06-27 11:01 ` Anshuman Khandual
2013-06-24 11:28 ` [PATCH 5/8] powerpc/perf: Don't enable if we have zero events Michael Ellerman
2013-06-28 5:10 ` Anshuman Khandual
2013-06-24 11:28 ` [PATCH 6/8] powerpc/perf: Drop MMCRA from thread_struct Michael Ellerman
2013-06-24 11:28 ` [PATCH 7/8] powerpc/perf: Core EBB support for 64-bit book3s Michael Ellerman
2013-06-26 8:38 ` Anshuman Khandual
2013-06-27 11:52 ` Michael Ellerman
2013-06-24 11:28 ` [PATCH 8/8] powerpc/perf: Add power8 EBB support Michael Ellerman
2013-06-26 9:58 ` Anshuman Khandual
2013-06-27 11:52 ` Michael Ellerman
2013-06-28 4:15 ` Anshuman Khandual
2013-07-04 18:58 ` Adhemerval Zanella
2013-07-05 2:54 ` Michael Ellerman
2013-07-05 17:57 ` Adhemerval Zanella
2013-06-25 10:55 ` [PATCH 1/8] powerpc/perf: Check that events only include valid bits on Power8 Anshuman Khandual
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