[PATCH V3 1/2] powerpc/MPIC: Add get_version API both for internal and external use

[PATCH V3 1/2] powerpc/MPIC: Add get_version API both for internal and external use

[Jia Hongtao]

MPIC version is useful information for both mpic_alloc() and mpic_init().
The patch provide an API to get MPIC version for reusing the code.
Also, some other IP block may need MPIC version for their own use.
The API for external use is also provided.

Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
Changes for V3:
* change the name of function from mpic_primary_get_version() to
  fsl_mpic_primary_get_version().
* return 0 if mpic_primary is null.

 arch/powerpc/include/asm/mpic.h |  3 +++
 arch/powerpc/sysdev/mpic.c      | 29 ++++++++++++++++++++++-------
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index c0f9ef9..ea6bf72 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -393,6 +393,9 @@ struct mpic
 #define	MPIC_REGSET_STANDARD		MPIC_REGSET(0)	/* Original MPIC */
 #define	MPIC_REGSET_TSI108		MPIC_REGSET(1)	/* Tsi108/109 PIC */
 
+/* Get the version of primary MPIC */
+extern u32 fsl_mpic_primary_get_version(void);
+
 /* Allocate the controller structure and setup the linux irq descs
  * for the range if interrupts passed in. No HW initialization is
  * actually performed.
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index d30e6a6..e793337 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1165,10 +1165,30 @@ static struct irq_domain_ops mpic_host_ops = {
 	.xlate = mpic_host_xlate,
 };
 
+static u32 mpic_get_version(struct mpic *mpic)
+{
+	u32 brr1;
+
+	brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
+			MPIC_FSL_BRR1);
+
+	return brr1 & MPIC_FSL_BRR1_VER;
+}
+
 /*
  * Exported functions
  */
 
+u32 fsl_mpic_primary_get_version(void)
+{
+	struct mpic *mpic = mpic_primary;
+
+	if (mpic)
+		return mpic_get_version(mpic);
+
+	return 0;
+}
+
 struct mpic * __init mpic_alloc(struct device_node *node,
 				phys_addr_t phys_addr,
 				unsigned int flags,
@@ -1315,7 +1335,6 @@ struct mpic * __init mpic_alloc(struct device_node *node,
 	mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
 
 	if (mpic->flags & MPIC_FSL) {
-		u32 brr1;
 		int ret;
 
 		/*
@@ -1326,9 +1345,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
 		mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs,
 			 MPIC_CPU_THISBASE, 0x1000);
 
-		brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
-				MPIC_FSL_BRR1);
-		fsl_version = brr1 & MPIC_FSL_BRR1_VER;
+		fsl_version = mpic_get_version(mpic);
 
 		/* Error interrupt mask register (EIMR) is required for
 		 * handling individual device error interrupts. EIMR
@@ -1518,9 +1535,7 @@ void __init mpic_init(struct mpic *mpic)
 	mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0xf);
 
 	if (mpic->flags & MPIC_FSL) {
-		u32 brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
-				      MPIC_FSL_BRR1);
-		u32 version = brr1 & MPIC_FSL_BRR1_VER;
+		u32 version = mpic_get_version(mpic);
 
 		/*
 		 * Timer group B is present at the latest in MPIC 3.1 (e.g.
-- 
1.8.0

[PATCH V2 2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Jia Hongtao]

The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It causes
that neither MSI nor MSI-X can work fine. This is a workaround to allow
MSI-X to function properly.

Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
---
Changes for V2:
* change the name of function mpic_has_errata() to mpic_has_erratum_pic1().
* move MSI_HW_ERRATA_ENDIAN define to fsl_msi.h with all other defines.

 arch/powerpc/sysdev/fsl_msi.c | 40 +++++++++++++++++++++++++++++++++++++---
 arch/powerpc/sysdev/fsl_msi.h |  2 ++
 2 files changed, 39 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 178c994..ca1157a 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -98,8 +98,18 @@ static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
 
 static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
 {
-	if (type == PCI_CAP_ID_MSIX)
-		pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
+	struct fsl_msi *msi;
+
+	if (type == PCI_CAP_ID_MSI) {
+		/*
+		 * MPIC version 2.0 has erratum PIC1. For now MSI
+		 * could not work. So check to prevent MSI from
+		 * being used on the board with this erratum.
+		 */
+		list_for_each_entry(msi, &msi_head, list)
+			if (msi->feature & MSI_HW_ERRATA_ENDIAN)
+				return -EINVAL;
+	}
 
 	return 0;
 }
@@ -142,7 +152,17 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
 	msg->address_lo = lower_32_bits(address);
 	msg->address_hi = upper_32_bits(address);
 
-	msg->data = hwirq;
+	/*
+	 * MPIC version 2.0 has erratum PIC1. It causes
+	 * that neither MSI nor MSI-X can work fine.
+	 * This is a workaround to allow MSI-X to function
+	 * properly. It only works for MSI-X, we prevent
+	 * MSI on buggy chips in fsl_msi_check_device().
+	 */
+	if (msi_data->feature & MSI_HW_ERRATA_ENDIAN)
+		msg->data = __swab32(hwirq);
+	else
+		msg->data = hwirq;
 
 	pr_debug("%s: allocated srs: %d, ibs: %d\n",
 		__func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
@@ -361,6 +381,15 @@ static int fsl_msi_setup_hwirq(struct fsl_msi *msi, struct platform_device *dev,
 	return 0;
 }
 
+/* MPIC version 2.0 has erratum PIC1 */
+static int mpic_has_erratum_pic1(void)
+{
+	if (fsl_mpic_primary_get_version() == 0x0200)
+		return 1;
+
+	return 0;
+}
+
 static const struct of_device_id fsl_of_msi_ids[];
 static int fsl_of_msi_probe(struct platform_device *dev)
 {
@@ -423,6 +452,11 @@ static int fsl_of_msi_probe(struct platform_device *dev)
 
 	msi->feature = features->fsl_pic_ip;
 
+	if ((features->fsl_pic_ip & FSL_PIC_IP_MASK) == FSL_PIC_IP_MPIC) {
+		if (mpic_has_erratum_pic1())
+			msi->feature |= MSI_HW_ERRATA_ENDIAN;
+	}
+
 	/*
 	 * Remember the phandle, so that we can match with any PCI nodes
 	 * that have an "fsl,msi" property.
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
index 8225f86..7389e8e 100644
--- a/arch/powerpc/sysdev/fsl_msi.h
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -25,6 +25,8 @@
 #define FSL_PIC_IP_IPIC   0x00000002
 #define FSL_PIC_IP_VMPIC  0x00000003
 
+#define MSI_HW_ERRATA_ENDIAN 0x00000010
+
 struct fsl_msi {
 	struct irq_domain *irqhost;
 
-- 
1.8.0

Re: [PATCH V3 1/2] powerpc/MPIC: Add get_version API both for internal and external use

[Scott Wood]

On 04/02/2013 09:03:17 PM, Jia Hongtao wrote:
> MPIC version is useful information for both mpic_alloc() and =20
> mpic_init().
> The patch provide an API to get MPIC version for reusing the code.
> Also, some other IP block may need MPIC version for their own use.
> The API for external use is also provided.
>=20
> Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> Changes for V3:
> * change the name of function from mpic_primary_get_version() to
>   fsl_mpic_primary_get_version().
> * return 0 if mpic_primary is null.
>=20
>  arch/powerpc/include/asm/mpic.h |  3 +++
>  arch/powerpc/sysdev/mpic.c      | 29 ++++++++++++++++++++++-------
>  2 files changed, 25 insertions(+), 7 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/mpic.h =20
> b/arch/powerpc/include/asm/mpic.h
> index c0f9ef9..ea6bf72 100644
> --- a/arch/powerpc/include/asm/mpic.h
> +++ b/arch/powerpc/include/asm/mpic.h
> @@ -393,6 +393,9 @@ struct mpic
>  #define	MPIC_REGSET_STANDARD		MPIC_REGSET(0)	/* =20
> Original MPIC */
>  #define	MPIC_REGSET_TSI108		MPIC_REGSET(1)	/* =20
> Tsi108/109 PIC */
>=20
> +/* Get the version of primary MPIC */
> +extern u32 fsl_mpic_primary_get_version(void);
> +
>  /* Allocate the controller structure and setup the linux irq descs
>   * for the range if interrupts passed in. No HW initialization is
>   * actually performed.
> diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> index d30e6a6..e793337 100644
> --- a/arch/powerpc/sysdev/mpic.c
> +++ b/arch/powerpc/sysdev/mpic.c
> @@ -1165,10 +1165,30 @@ static struct irq_domain_ops mpic_host_ops =3D {
>  	.xlate =3D mpic_host_xlate,
>  };
>=20
> +static u32 mpic_get_version(struct mpic *mpic)
> +{
> +	u32 brr1;
> +
> +	brr1 =3D _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> +			MPIC_FSL_BRR1);
> +
> +	return brr1 & MPIC_FSL_BRR1_VER;
> +}

This one should have "fsl" in the name as well.

-Scott=

Re: [V2,2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Scott Wood]

On Wed, Apr 03, 2013 at 10:03:18AM +0800, Hongtao Jia wrote:
> The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It causes
> that neither MSI nor MSI-X can work fine. This is a workaround to allow
> MSI-X to function properly.
> 
> Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>

Building on 83xx:

  arch/powerpc/sysdev/built-in.o: In function `fsl_of_msi_probe':
  fsl_msi.c:(.text+0x1464): undefined reference to `fsl_mpic_primary_get_version'
  make[1]: *** [vmlinux] Error 1
  make: *** [sub-make] Error 2

fsl_msi.c supports IPIC as well.

-Scott

RE: [V2,2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Jia Hongtao-B38951]

> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Friday, June 28, 2013 10:29 AM
> To: Jia Hongtao-B38951
> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood Scott-
> B07421
> Subject: Re: [V2,2/2] powerpc/85xx: workaround for chips with MSI
> hardware errata
>=20
> On Wed, Apr 03, 2013 at 10:03:18AM +0800, Hongtao Jia wrote:
> > The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It
> > causes that neither MSI nor MSI-X can work fine. This is a workaround
> > to allow MSI-X to function properly.
> >
> > Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
>=20
> Building on 83xx:
>=20
>   arch/powerpc/sysdev/built-in.o: In function `fsl_of_msi_probe':
>   fsl_msi.c:(.text+0x1464): undefined reference to
> `fsl_mpic_primary_get_version'
>   make[1]: *** [vmlinux] Error 1
>   make: *** [sub-make] Error 2
>=20
> fsl_msi.c supports IPIC as well.
>=20
> -Scott

Hi Scott,
I updated the patch to fix this compile error just now.
please refer to:
http://patchwork.ozlabs.org/patch/256018/

Thanks.
-Hongtao

RE: [V2,2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Jia Hongtao-B38951]

> -----Original Message-----
> From: Jia Hongtao-B38951
> Sent: Monday, July 01, 2013 5:36 PM
> To: Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org
> Subject: RE: [V2,2/2] powerpc/85xx: workaround for chips with MSI
> hardware errata
>=20
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Friday, June 28, 2013 10:29 AM
> > To: Jia Hongtao-B38951
> > Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood
> > Scott-
> > B07421
> > Subject: Re: [V2,2/2] powerpc/85xx: workaround for chips with MSI
> > hardware errata
> >
> > On Wed, Apr 03, 2013 at 10:03:18AM +0800, Hongtao Jia wrote:
> > > The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It
> > > causes that neither MSI nor MSI-X can work fine. This is a
> > > workaround to allow MSI-X to function properly.
> > >
> > > Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> > > Signed-off-by: Li Yang <leoli@freescale.com>
> > > Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> >
> > Building on 83xx:
> >
> >   arch/powerpc/sysdev/built-in.o: In function `fsl_of_msi_probe':
> >   fsl_msi.c:(.text+0x1464): undefined reference to
> > `fsl_mpic_primary_get_version'
> >   make[1]: *** [vmlinux] Error 1
> >   make: *** [sub-make] Error 2
> >
> > fsl_msi.c supports IPIC as well.
> >
> > -Scott
>=20
> Hi Scott,
> I updated the patch to fix this compile error just now.
> please refer to:
> http://patchwork.ozlabs.org/patch/256018/
>=20
> Thanks.
> -Hongtao

Hi Scott,

The 83xx compile issue has already been fixed.
Please have a review on this patch.

Thanks.
-Hongtao

Re: [V2,2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Scott Wood]

On Wed, 2013-09-04 at 23:00 -0500, Jia Hongtao-B38951 wrote:
> > -----Original Message-----
> > From: Jia Hongtao-B38951
> > Sent: Monday, July 01, 2013 5:36 PM
> > To: Wood Scott-B07421
> > Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org
> > Subject: RE: [V2,2/2] powerpc/85xx: workaround for chips with MSI
> > hardware errata
> > 
> > > -----Original Message-----
> > > From: Wood Scott-B07421
> > > Sent: Friday, June 28, 2013 10:29 AM
> > > To: Jia Hongtao-B38951
> > > Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood
> > > Scott-
> > > B07421
> > > Subject: Re: [V2,2/2] powerpc/85xx: workaround for chips with MSI
> > > hardware errata
> > >
> > > On Wed, Apr 03, 2013 at 10:03:18AM +0800, Hongtao Jia wrote:
> > > > The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It
> > > > causes that neither MSI nor MSI-X can work fine. This is a
> > > > workaround to allow MSI-X to function properly.
> > > >
> > > > Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> > > > Signed-off-by: Li Yang <leoli@freescale.com>
> > > > Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> > >
> > > Building on 83xx:
> > >
> > >   arch/powerpc/sysdev/built-in.o: In function `fsl_of_msi_probe':
> > >   fsl_msi.c:(.text+0x1464): undefined reference to
> > > `fsl_mpic_primary_get_version'
> > >   make[1]: *** [vmlinux] Error 1
> > >   make: *** [sub-make] Error 2
> > >
> > > fsl_msi.c supports IPIC as well.
> > >
> > > -Scott
> > 
> > Hi Scott,
> > I updated the patch to fix this compile error just now.
> > please refer to:
> > http://patchwork.ozlabs.org/patch/256018/
> > 
> > Thanks.
> > -Hongtao
> 
> Hi Scott,
> 
> The 83xx compile issue has already been fixed.
> Please have a review on this patch.

Oh, sorry -- I missed it because it was marked "Changes Requested".
I've changed the status and will consider it for the next batch of
"next" patches.

In the future, if a patch is miscategorized in patchwork (e.g. says
"changes requested" when there is no longer a need to submit a new
patch) please mention that specifically and provide the patchwork URL.

-Scott

Re: [PATCH V2 2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Kumar Gala]

On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:

> The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It =
causes
> that neither MSI nor MSI-X can work fine. This is a workaround to =
allow
> MSI-X to function properly.
>=20
> Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> ---
> Changes for V2:
> * change the name of function mpic_has_errata() to =
mpic_has_erratum_pic1().
> * move MSI_HW_ERRATA_ENDIAN define to fsl_msi.h with all other =
defines.
>=20
> arch/powerpc/sysdev/fsl_msi.c | 40 =
+++++++++++++++++++++++++++++++++++++---
> arch/powerpc/sysdev/fsl_msi.h |  2 ++
> 2 files changed, 39 insertions(+), 3 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/fsl_msi.c =
b/arch/powerpc/sysdev/fsl_msi.c
> index 178c994..ca1157a 100644
> --- a/arch/powerpc/sysdev/fsl_msi.c
> +++ b/arch/powerpc/sysdev/fsl_msi.c
> @@ -98,8 +98,18 @@ static int fsl_msi_init_allocator(struct fsl_msi =
*msi_data)
>=20
> static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int =
type)
> {
> -	if (type =3D=3D PCI_CAP_ID_MSIX)
> -		pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
> +	struct fsl_msi *msi;
> +
> +	if (type =3D=3D PCI_CAP_ID_MSI) {
> +		/*
> +		 * MPIC version 2.0 has erratum PIC1. For now MSI
> +		 * could not work. So check to prevent MSI from
> +		 * being used on the board with this erratum.
> +		 */
> +		list_for_each_entry(msi, &msi_head, list)
> +			if (msi->feature & MSI_HW_ERRATA_ENDIAN)
> +				return -EINVAL;
> +	}
>=20
> 	return 0;
> }
> @@ -142,7 +152,17 @@ static void fsl_compose_msi_msg(struct pci_dev =
*pdev, int hwirq,
> 	msg->address_lo =3D lower_32_bits(address);
> 	msg->address_hi =3D upper_32_bits(address);
>=20
> -	msg->data =3D hwirq;
> +	/*
> +	 * MPIC version 2.0 has erratum PIC1. It causes
> +	 * that neither MSI nor MSI-X can work fine.
> +	 * This is a workaround to allow MSI-X to function
> +	 * properly. It only works for MSI-X, we prevent
> +	 * MSI on buggy chips in fsl_msi_check_device().
> +	 */
> +	if (msi_data->feature & MSI_HW_ERRATA_ENDIAN)
> +		msg->data =3D __swab32(hwirq);
> +	else
> +		msg->data =3D hwirq;
>=20
> 	pr_debug("%s: allocated srs: %d, ibs: %d\n",
> 		__func__, hwirq / IRQS_PER_MSI_REG, hwirq % =
IRQS_PER_MSI_REG);
> @@ -361,6 +381,15 @@ static int fsl_msi_setup_hwirq(struct fsl_msi =
*msi, struct platform_device *dev,
> 	return 0;
> }
>=20
> +/* MPIC version 2.0 has erratum PIC1 */
> +static int mpic_has_erratum_pic1(void)
> +{
> +	if (fsl_mpic_primary_get_version() =3D=3D 0x0200)
> +		return 1;
> +
> +	return 0;
> +}
> +
> static const struct of_device_id fsl_of_msi_ids[];
> static int fsl_of_msi_probe(struct platform_device *dev)
> {
> @@ -423,6 +452,11 @@ static int fsl_of_msi_probe(struct =
platform_device *dev)
>=20
> 	msi->feature =3D features->fsl_pic_ip;
>=20
> +	if ((features->fsl_pic_ip & FSL_PIC_IP_MASK) =3D=3D =
FSL_PIC_IP_MPIC) {
> +		if (mpic_has_erratum_pic1())

Get ride of the mpic_has_erratum_pic1() function and just put the test =
here

> +			msi->feature |=3D MSI_HW_ERRATA_ENDIAN;
> +	}
> +
> 	/*
> 	 * Remember the phandle, so that we can match with any PCI nodes
> 	 * that have an "fsl,msi" property.
> diff --git a/arch/powerpc/sysdev/fsl_msi.h =
b/arch/powerpc/sysdev/fsl_msi.h
> index 8225f86..7389e8e 100644
> --- a/arch/powerpc/sysdev/fsl_msi.h
> +++ b/arch/powerpc/sysdev/fsl_msi.h
> @@ -25,6 +25,8 @@
> #define FSL_PIC_IP_IPIC   0x00000002
> #define FSL_PIC_IP_VMPIC  0x00000003
>=20
> +#define MSI_HW_ERRATA_ENDIAN 0x00000010
> +

Why does this need to be in the header, why not just have it in the .c =
only

> struct fsl_msi {
> 	struct irq_domain *irqhost;
>=20
> --=20
> 1.8.0
>=20

Re: [PATCH V2 2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Scott Wood]

On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
> On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
> > +			msi->feature |= MSI_HW_ERRATA_ENDIAN;
> > +	}
> > +
> > 	/*
> > 	 * Remember the phandle, so that we can match with any PCI nodes
> > 	 * that have an "fsl,msi" property.
> > diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
> > index 8225f86..7389e8e 100644
> > --- a/arch/powerpc/sysdev/fsl_msi.h
> > +++ b/arch/powerpc/sysdev/fsl_msi.h
> > @@ -25,6 +25,8 @@
> > #define FSL_PIC_IP_IPIC   0x00000002
> > #define FSL_PIC_IP_VMPIC  0x00000003
> > 
> > +#define MSI_HW_ERRATA_ENDIAN 0x00000010
> > +
> 
> Why does this need to be in the header, why not just have it in the .c only

Didn't you ask this last time around? :-)

This flag is part of the same numberspace as FSL_PIC_IP_xxx and thus
should be defined in the same place.

-Scott

RE: [V2,2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Jia Hongtao-B38951]

DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0
MjENCj4gU2VudDogRnJpZGF5LCBTZXB0ZW1iZXIgMDYsIDIwMTMgMTo1NyBBTQ0KPiBUbzogSmlh
IEhvbmd0YW8tQjM4OTUxDQo+IENjOiBXb29kIFNjb3R0LUIwNzQyMTsgbGludXhwcGMtZGV2QGxp
c3RzLm96bGFicy5vcmc7DQo+IGdhbGFrQGtlcm5lbC5jcmFzaGluZy5vcmcNCj4gU3ViamVjdDog
UmU6IFtWMiwyLzJdIHBvd2VycGMvODV4eDogd29ya2Fyb3VuZCBmb3IgY2hpcHMgd2l0aCBNU0kN
Cj4gaGFyZHdhcmUgZXJyYXRhDQo+IA0KPiBPbiBXZWQsIDIwMTMtMDktMDQgYXQgMjM6MDAgLTA1
MDAsIEppYSBIb25ndGFvLUIzODk1MSB3cm90ZToNCj4gPiA+IC0tLS0tT3JpZ2luYWwgTWVzc2Fn
ZS0tLS0tDQo+ID4gPiBGcm9tOiBKaWEgSG9uZ3Rhby1CMzg5NTENCj4gPiA+IFNlbnQ6IE1vbmRh
eSwgSnVseSAwMSwgMjAxMyA1OjM2IFBNDQo+ID4gPiBUbzogV29vZCBTY290dC1CMDc0MjENCj4g
PiA+IENjOiBsaW51eHBwYy1kZXZAbGlzdHMub3psYWJzLm9yZzsgZ2FsYWtAa2VybmVsLmNyYXNo
aW5nLm9yZw0KPiA+ID4gU3ViamVjdDogUkU6IFtWMiwyLzJdIHBvd2VycGMvODV4eDogd29ya2Fy
b3VuZCBmb3IgY2hpcHMgd2l0aCBNU0kNCj4gPiA+IGhhcmR3YXJlIGVycmF0YQ0KPiA+ID4NCj4g
PiA+ID4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gPiA+ID4gRnJvbTogV29vZCBTY290
dC1CMDc0MjENCj4gPiA+ID4gU2VudDogRnJpZGF5LCBKdW5lIDI4LCAyMDEzIDEwOjI5IEFNDQo+
ID4gPiA+IFRvOiBKaWEgSG9uZ3Rhby1CMzg5NTENCj4gPiA+ID4gQ2M6IGxpbnV4cHBjLWRldkBs
aXN0cy5vemxhYnMub3JnOyBnYWxha0BrZXJuZWwuY3Jhc2hpbmcub3JnOyBXb29kDQo+ID4gPiA+
IFNjb3R0LQ0KPiA+ID4gPiBCMDc0MjENCj4gPiA+ID4gU3ViamVjdDogUmU6IFtWMiwyLzJdIHBv
d2VycGMvODV4eDogd29ya2Fyb3VuZCBmb3IgY2hpcHMgd2l0aCBNU0kNCj4gPiA+ID4gaGFyZHdh
cmUgZXJyYXRhDQo+ID4gPiA+DQo+ID4gPiA+IE9uIFdlZCwgQXByIDAzLCAyMDEzIGF0IDEwOjAz
OjE4QU0gKzA4MDAsIEhvbmd0YW8gSmlhIHdyb3RlOg0KPiA+ID4gPiA+IFRoZSBNUElDIHZlcnNp
b24gMi4wIGhhcyBhIE1TSSBlcnJhdGEgKGVycmF0YSBQSUMxIG9mIG1wYzg1NDQpLA0KPiA+ID4g
PiA+IEl0IGNhdXNlcyB0aGF0IG5laXRoZXIgTVNJIG5vciBNU0ktWCBjYW4gd29yayBmaW5lLiBU
aGlzIGlzIGENCj4gPiA+ID4gPiB3b3JrYXJvdW5kIHRvIGFsbG93IE1TSS1YIHRvIGZ1bmN0aW9u
IHByb3Blcmx5Lg0KPiA+ID4gPiA+DQo+ID4gPiA+ID4gU2lnbmVkLW9mZi1ieTogTGl1IFNodW8g
PHNvbmljY2F0LmxpdUBnbWFpbC5jb20+DQo+ID4gPiA+ID4gU2lnbmVkLW9mZi1ieTogTGkgWWFu
ZyA8bGVvbGlAZnJlZXNjYWxlLmNvbT4NCj4gPiA+ID4gPiBTaWduZWQtb2ZmLWJ5OiBKaWEgSG9u
Z3RhbyA8aG9uZ3Rhby5qaWFAZnJlZXNjYWxlLmNvbT4NCj4gPiA+ID4NCj4gPiA+ID4gQnVpbGRp
bmcgb24gODN4eDoNCj4gPiA+ID4NCj4gPiA+ID4gICBhcmNoL3Bvd2VycGMvc3lzZGV2L2J1aWx0
LWluLm86IEluIGZ1bmN0aW9uIGBmc2xfb2ZfbXNpX3Byb2JlJzoNCj4gPiA+ID4gICBmc2xfbXNp
LmM6KC50ZXh0KzB4MTQ2NCk6IHVuZGVmaW5lZCByZWZlcmVuY2UgdG8NCj4gPiA+ID4gYGZzbF9t
cGljX3ByaW1hcnlfZ2V0X3ZlcnNpb24nDQo+ID4gPiA+ICAgbWFrZVsxXTogKioqIFt2bWxpbnV4
XSBFcnJvciAxDQo+ID4gPiA+ICAgbWFrZTogKioqIFtzdWItbWFrZV0gRXJyb3IgMg0KPiA+ID4g
Pg0KPiA+ID4gPiBmc2xfbXNpLmMgc3VwcG9ydHMgSVBJQyBhcyB3ZWxsLg0KPiA+ID4gPg0KPiA+
ID4gPiAtU2NvdHQNCj4gPiA+DQo+ID4gPiBIaSBTY290dCwNCj4gPiA+IEkgdXBkYXRlZCB0aGUg
cGF0Y2ggdG8gZml4IHRoaXMgY29tcGlsZSBlcnJvciBqdXN0IG5vdy4NCj4gPiA+IHBsZWFzZSBy
ZWZlciB0bzoNCj4gPiA+IGh0dHA6Ly9wYXRjaHdvcmsub3psYWJzLm9yZy9wYXRjaC8yNTYwMTgv
DQo+ID4gPg0KPiA+ID4gVGhhbmtzLg0KPiA+ID4gLUhvbmd0YW8NCj4gPg0KPiA+IEhpIFNjb3R0
LA0KPiA+DQo+ID4gVGhlIDgzeHggY29tcGlsZSBpc3N1ZSBoYXMgYWxyZWFkeSBiZWVuIGZpeGVk
Lg0KPiA+IFBsZWFzZSBoYXZlIGEgcmV2aWV3IG9uIHRoaXMgcGF0Y2guDQo+IA0KPiBPaCwgc29y
cnkgLS0gSSBtaXNzZWQgaXQgYmVjYXVzZSBpdCB3YXMgbWFya2VkICJDaGFuZ2VzIFJlcXVlc3Rl
ZCIuDQo+IEkndmUgY2hhbmdlZCB0aGUgc3RhdHVzIGFuZCB3aWxsIGNvbnNpZGVyIGl0IGZvciB0
aGUgbmV4dCBiYXRjaCBvZiAibmV4dCINCj4gcGF0Y2hlcy4NCj4gDQo+IEluIHRoZSBmdXR1cmUs
IGlmIGEgcGF0Y2ggaXMgbWlzY2F0ZWdvcml6ZWQgaW4gcGF0Y2h3b3JrIChlLmcuIHNheXMNCj4g
ImNoYW5nZXMgcmVxdWVzdGVkIiB3aGVuIHRoZXJlIGlzIG5vIGxvbmdlciBhIG5lZWQgdG8gc3Vi
bWl0IGEgbmV3DQo+IHBhdGNoKSBwbGVhc2UgbWVudGlvbiB0aGF0IHNwZWNpZmljYWxseSBhbmQg
cHJvdmlkZSB0aGUgcGF0Y2h3b3JrIFVSTC4NCj4gDQo+IC1TY290dA0KPiANCg0KT2ssIGdvdCBp
dC4NClNvcnJ5IGZvciB5b3VyIGluY29udmVuaWVudC4gDQoNCi1Ib25ndGFvDQoNCg==

Re: [PATCH V2 2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Kumar Gala]

On Sep 5, 2013, at 1:37 PM, Scott Wood wrote:

> On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
>> On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
>>> +			msi->feature |=3D MSI_HW_ERRATA_ENDIAN;
>>> +	}
>>> +
>>> 	/*
>>> 	 * Remember the phandle, so that we can match with any PCI nodes
>>> 	 * that have an "fsl,msi" property.
>>> diff --git a/arch/powerpc/sysdev/fsl_msi.h =
b/arch/powerpc/sysdev/fsl_msi.h
>>> index 8225f86..7389e8e 100644
>>> --- a/arch/powerpc/sysdev/fsl_msi.h
>>> +++ b/arch/powerpc/sysdev/fsl_msi.h
>>> @@ -25,6 +25,8 @@
>>> #define FSL_PIC_IP_IPIC   0x00000002
>>> #define FSL_PIC_IP_VMPIC  0x00000003
>>>=20
>>> +#define MSI_HW_ERRATA_ENDIAN 0x00000010
>>> +
>>=20
>> Why does this need to be in the header, why not just have it in the =
.c only
>=20
> Didn't you ask this last time around? :-)
>=20
> This flag is part of the same numberspace as FSL_PIC_IP_xxx and thus
> should be defined in the same place.

I probably did, if its part of the FSL_PIC_IP_xxx namespace, than lets =
remove blank line between things to make that a bit more clear

- k

Re: [PATCH V2 2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Scott Wood]

On Fri, 2013-09-06 at 10:01 -0500, Kumar Gala wrote:
> On Sep 5, 2013, at 1:37 PM, Scott Wood wrote:
> 
> > On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
> >> On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
> >>> +			msi->feature |= MSI_HW_ERRATA_ENDIAN;
> >>> +	}
> >>> +
> >>> 	/*
> >>> 	 * Remember the phandle, so that we can match with any PCI nodes
> >>> 	 * that have an "fsl,msi" property.
> >>> diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
> >>> index 8225f86..7389e8e 100644
> >>> --- a/arch/powerpc/sysdev/fsl_msi.h
> >>> +++ b/arch/powerpc/sysdev/fsl_msi.h
> >>> @@ -25,6 +25,8 @@
> >>> #define FSL_PIC_IP_IPIC   0x00000002
> >>> #define FSL_PIC_IP_VMPIC  0x00000003
> >>> 
> >>> +#define MSI_HW_ERRATA_ENDIAN 0x00000010
> >>> +
> >> 
> >> Why does this need to be in the header, why not just have it in the .c only
> > 
> > Didn't you ask this last time around? :-)
> > 
> > This flag is part of the same numberspace as FSL_PIC_IP_xxx and thus
> > should be defined in the same place.
> 
> I probably did, if its part of the FSL_PIC_IP_xxx namespace, than lets remove blank line between things to make that a bit more clear

It's not part of the FSL_PIC_IP_MASK subnumberspace though, just the
overall msi->features numberspace.

It would be nice if these symbols could have some sort of prefix in
common, though.

-Scott

Re: [PATCH V2 2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Kumar Gala]

On Sep 6, 2013, at 10:36 AM, Scott Wood wrote:

> On Fri, 2013-09-06 at 10:01 -0500, Kumar Gala wrote:
>> On Sep 5, 2013, at 1:37 PM, Scott Wood wrote:
>>=20
>>> On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
>>>> On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
>>>>> +			msi->feature |=3D MSI_HW_ERRATA_ENDIAN;
>>>>> +	}
>>>>> +
>>>>> 	/*
>>>>> 	 * Remember the phandle, so that we can match with any PCI nodes
>>>>> 	 * that have an "fsl,msi" property.
>>>>> diff --git a/arch/powerpc/sysdev/fsl_msi.h =
b/arch/powerpc/sysdev/fsl_msi.h
>>>>> index 8225f86..7389e8e 100644
>>>>> --- a/arch/powerpc/sysdev/fsl_msi.h
>>>>> +++ b/arch/powerpc/sysdev/fsl_msi.h
>>>>> @@ -25,6 +25,8 @@
>>>>> #define FSL_PIC_IP_IPIC   0x00000002
>>>>> #define FSL_PIC_IP_VMPIC  0x00000003
>>>>>=20
>>>>> +#define MSI_HW_ERRATA_ENDIAN 0x00000010
>>>>> +
>>>>=20
>>>> Why does this need to be in the header, why not just have it in the =
.c only
>>>=20
>>> Didn't you ask this last time around? :-)
>>>=20
>>> This flag is part of the same numberspace as FSL_PIC_IP_xxx and thus
>>> should be defined in the same place.
>>=20
>> I probably did, if its part of the FSL_PIC_IP_xxx namespace, than =
lets remove blank line between things to make that a bit more clear
>=20
> It's not part of the FSL_PIC_IP_MASK subnumberspace though, just the
> overall msi->features numberspace.
>=20
> It would be nice if these symbols could have some sort of prefix in
> common, though.
>=20
> -Scott

Maybe we should do something like MSI_FTR_ as a prefix

- k