* [PATCH] powerpc: Correct FSCR bit definitions
@ 2013-09-05 6:01 Paul Mackerras
2013-09-05 6:09 ` Michael Neuling
0 siblings, 1 reply; 2+ messages in thread
From: Paul Mackerras @ 2013-09-05 6:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Michael Neuling
Commit 74e400cee6 ("powerpc: Rework setting up H/FSCR bit definitions")
ended up with incorrect bit numbers for FSCR_PM_LG and FSCR_BHRB_LG.
This fixes them.
Signed-off-by: Paul Mackerras <paulus@samba.org>
---
arch/powerpc/include/asm/reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index dc10bf5..10d1ef0 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -258,8 +258,8 @@
#define FSCR_TAR_LG 8 /* Enable Target Address Register */
#define FSCR_EBB_LG 7 /* Enable Event Based Branching */
#define FSCR_TM_LG 5 /* Enable Transactional Memory */
-#define FSCR_PM_LG 4 /* Enable prob/priv access to PMU SPRs */
-#define FSCR_BHRB_LG 3 /* Enable Branch History Rolling Buffer*/
+#define FSCR_BHRB_LG 4 /* Enable Branch History Rolling Buffer*/
+#define FSCR_PM_LG 3 /* Enable prob/priv access to PMU SPRs */
#define FSCR_DSCR_LG 2 /* Enable Data Stream Control Register */
#define FSCR_VECVSX_LG 1 /* Enable VMX/VSX */
#define FSCR_FP_LG 0 /* Enable Floating Point */
--
1.8.4.rc3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] powerpc: Correct FSCR bit definitions
2013-09-05 6:01 [PATCH] powerpc: Correct FSCR bit definitions Paul Mackerras
@ 2013-09-05 6:09 ` Michael Neuling
0 siblings, 0 replies; 2+ messages in thread
From: Michael Neuling @ 2013-09-05 6:09 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Paul Mackerras <paulus@samba.org> wrote:
> Commit 74e400cee6 ("powerpc: Rework setting up H/FSCR bit definitions")
> ended up with incorrect bit numbers for FSCR_PM_LG and FSCR_BHRB_LG.
> This fixes them.
>
> Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Sorry about that screw up.
Mikey
> ---
> arch/powerpc/include/asm/reg.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index dc10bf5..10d1ef0 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -258,8 +258,8 @@
> #define FSCR_TAR_LG 8 /* Enable Target Address Register */
> #define FSCR_EBB_LG 7 /* Enable Event Based Branching */
> #define FSCR_TM_LG 5 /* Enable Transactional Memory */
> -#define FSCR_PM_LG 4 /* Enable prob/priv access to PMU SPRs */
> -#define FSCR_BHRB_LG 3 /* Enable Branch History Rolling Buffer*/
> +#define FSCR_BHRB_LG 4 /* Enable Branch History Rolling Buffer*/
> +#define FSCR_PM_LG 3 /* Enable prob/priv access to PMU SPRs */
> #define FSCR_DSCR_LG 2 /* Enable Data Stream Control Register */
> #define FSCR_VECVSX_LG 1 /* Enable VMX/VSX */
> #define FSCR_FP_LG 0 /* Enable Floating Point */
> --
> 1.8.4.rc3
>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2013-09-05 6:09 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-09-05 6:01 [PATCH] powerpc: Correct FSCR bit definitions Paul Mackerras
2013-09-05 6:09 ` Michael Neuling
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).