From: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
To: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Cc: Michael Ellerman <michaele@au1.ibm.com>,
linux-kernel@vger.kernel.org,
Stephane Eranian <eranian@google.com>,
linuxppc-dev@ozlabs.org, David Laight <David.Laight@ACULAB.COM>,
Paul Mackerras <paulus@samba.org>,
Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Subject: Re: [PATCH 02/10][v6] powerpc/Power7: detect load/store instructions
Date: Wed, 16 Oct 2013 08:39:29 -0700 [thread overview]
Message-ID: <20131016153929.GC25073@us.ibm.com> (raw)
In-Reply-To: <525E5E79.6010905@linux.vnet.ibm.com>
Anshuman Khandual [khandual@linux.vnet.ibm.com] wrote:
| On 10/16/2013 01:55 PM, David Laight wrote:
| >> Implement instr_is_load_store_2_06() to detect whether a given instruction
| >> is one of the fixed-point or floating-point load/store instructions in the
| >> POWER Instruction Set Architecture v2.06.
| > ...
|
| The op code encoding is dependent on the ISA version ? Does the basic load
| and store instructions change with newer ISA versions ?
TBH, I don't know whether the encoding is dependent on the ISA version.
We need this for a very narrow/specific purpose on Power7 _and_ did not
want to set up expectations that it will work with all versions. Hence
the horribly named function :-)
| BTW we have got a
| newer version for the ISA "PowerISA_V2.07_PUBLIC.pdf" here at power.org
|
| https://www.power.org/documentation/power-isa-version-2-07/
Yes, but on Power8 there is a bit in the SIER that tells us whether it
is a load or store instruction. We use that and don't need to determine
in software.
Power7 does not have such a bit and we need this only for Power7. We are
not targetting this "memory hierarchy" feature for Power6 or older processors.
|
| Does not sound like a good idea to analyse the instructions with functions
| names which specify ISA version number. Besides, this function does not
| belong to specific processor or platform. It has to be bit generic.
|
| >> +int instr_is_load_store_2_06(const unsigned int *instr)
| >> +{
| >> + unsigned int op, upper, lower;
| >> +
| >> + op = instr_opcode(*instr);
| >> +
| >> + if ((op >= 32 && op <= 58) || (op == 61 || op == 62))
| >> + return true;
| >> +
| >> + if (op != 31)
| >> + return false;
| >> +
| >> + upper = op >> 5;
| >> + lower = op & 0x1f;
| >> +
| >> + /* Short circuit as many misses as we can */
| >> + if (lower < 3 || lower > 23)
| >> + return false;
| >> +
| >> + if (lower == 3) {
| >> + if (upper >= 16)
| >> + return true;
| >> +
| >> + return false;
| >> + }
| >> +
| >> + if (lower == 7 || lower == 12)
| >> + return true;
| >> +
| >> + if (lower >= 20) /* && lower <= 23 (implicit) */
| >> + return true;
| >> +
| >> + return false;
| >> +}
| >
| > I can't help feeling the code could do with some comments about
| > which actual instructions are selected where.
|
| Yeah, I agree. At least which category of load-store instructions are
| getting selected in each case.
Like I mentioned in the other message, how about adding a couple
of lines in the function header ?
next prev parent reply other threads:[~2013-10-16 15:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-16 2:06 [PATCH 00/10][v6] powerpc/perf: Export memory hierarchy level in Power7/8 Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 01/10][v6] powerpc: Rename branch_opcode() to instr_opcode() Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 02/10][v6] powerpc/Power7: detect load/store instructions Sukadev Bhattiprolu
2013-10-16 8:25 ` David Laight
2013-10-16 9:38 ` Anshuman Khandual
2013-10-16 15:39 ` Sukadev Bhattiprolu [this message]
2013-10-16 15:27 ` Sukadev Bhattiprolu
2013-10-17 17:20 ` Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 03/10][v6] tools/perf: silence compiler warnings Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 04/10][v6] tools/perf: Remove local byteorder.h Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 05/10][v6] powerpc/perf: Remove PME_ prefix for power7 events Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 06/10][v6] powerpc/perf: Export Power8 generic events in sysfs Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 07/10][v6] powerpc/perf: Add Power8 event PM_MRK_GRP_CMPL to sysfs Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 08/10][v6] powerpc/perf: Define big-endian version of perf_mem_data_src Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 09/10][v6] powerpc/perf: Export Power8 memory hierarchy info to user space Sukadev Bhattiprolu
2013-10-16 2:06 ` [PATCH 10/10][v6] powerpc/perf: Export Power7 " Sukadev Bhattiprolu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20131016153929.GC25073@us.ibm.com \
--to=sukadev@linux.vnet.ibm.com \
--cc=David.Laight@ACULAB.COM \
--cc=acme@ghostprotocols.net \
--cc=eranian@google.com \
--cc=khandual@linux.vnet.ibm.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@ozlabs.org \
--cc=michaele@au1.ibm.com \
--cc=paulus@samba.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).