From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailhub1.si.c-s.fr (pegase1.c-s.fr [93.17.236.30]) by ozlabs.org (Postfix) with ESMTP id 4CA932C009E for ; Wed, 27 Nov 2013 22:04:18 +1100 (EST) From: Christophe Leroy To: Benjamin Herrenschmidt , Paul Mackerras , scottwood@freescale.com Subject: [PATCH] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB Message-Id: <20131127110406.6DC8E1A504F@localhost.localdomain> Date: Wed, 27 Nov 2013 12:04:06 +0100 (CET) Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Today, the only way to load kernels whose size is greater than 8Mbytes is to activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is limited to 8Mbytes. This patch sets up 24 Mbytes of initial memory regardless of whether CONFIG_PIN_TLB is active or not. It allows to load "big" kernels (for instance when activating CONFIG_LOCKDEP_SUPPORT) without having to activate CONFIG_PIN_TLB. Signed-off-by: Christophe Leroy diff -ur a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -841,11 +841,12 @@ ori r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */ mtspr SPRN_MD_RPN, r8 -#ifdef CONFIG_PIN_TLB /* Map two more 8M kernel data pages. */ +#ifdef CONFIG_PIN_TLB addi r10, r10, 0x0100 mtspr SPRN_MD_CTR, r10 +#endif lis r8, KERNELBASE@h /* Create vaddr for TLB */ addis r8, r8, 0x0080 /* Add 8M */ @@ -858,15 +859,16 @@ addis r11, r11, 0x0080 /* Add 8M */ mtspr SPRN_MD_RPN, r11 +#ifdef CONFIG_PIN_TLB addi r10, r10, 0x0100 mtspr SPRN_MD_CTR, r10 +#endif addis r8, r8, 0x0080 /* Add 8M */ mtspr SPRN_MD_EPN, r8 mtspr SPRN_MD_TWC, r9 addis r11, r11, 0x0080 /* Add 8M */ mtspr SPRN_MD_RPN, r11 -#endif /* Since the cache is enabled according to the information we * just loaded into the TLB, invalidate and enable the caches here. diff -ur a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c @@ -213,12 +213,7 @@ */ BUG_ON(first_memblock_base != 0); -#ifdef CONFIG_PIN_TLB /* 8xx can only access 24MB at the moment */ memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01800000)); -#else - /* 8xx can only access 8MB at the moment */ - memblock_set_current_limit(min_t(u64, first_memblock_size, 0x00800000)); -#endif } #endif /* CONFIG_8xx */