From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8EB2C2C0084 for ; Fri, 7 Feb 2014 23:28:46 +1100 (EST) Date: Fri, 7 Feb 2014 13:28:37 +0100 From: Peter Zijlstra To: Torsten Duwe Subject: Re: [PATCH] Convert powerpc simple spinlocks into ticket locks Message-ID: <20140207122837.GA3104@twins.programming.kicks-ass.net> References: <20140206103736.GA18054@lst.de> <20140206163837.GT2936@laptop.programming.kicks-ass.net> <20140206173727.GA13048@lst.de> <1391717992.6733.232.camel@snotra.buserror.net> <20140207090248.GB26811@lst.de> <20140207103139.GP5002@laptop.programming.kicks-ass.net> <20140207104530.GG5126@laptop.programming.kicks-ass.net> <20140207114949.GA2107@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20140207114949.GA2107@lst.de> Cc: Tom Musta , linux-kernel@vger.kernel.org, Paul Mackerras , Anton Blanchard , Scott Wood , "Paul E. McKenney" , linuxppc-dev@lists.ozlabs.org, Ingo Molnar List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Fri, Feb 07, 2014 at 12:49:49PM +0100, Torsten Duwe wrote: > On Fri, Feb 07, 2014 at 11:45:30AM +0100, Peter Zijlstra wrote: > > > > That might need to be lhz too, I'm confused on all the load variants. > > ;-) > > > > unlock: > > > lhz %0, 0, &tail > > > addic %0, %0, 1 > > No carry with this one, I'd say. Right you are, add immediate it is. > Besides, unlock increments the head. No, unlock increments the tail, lock increments the head and waits until the tail matches the pre-inc value. That said, why do the atomic_inc() primitives do an carry add? (that's where I borrowed it from). > > > lwsync > > > sth %0, 0, &tail > > > > > Given the beauty and simplicity of this, may I ask Ingo: > you signed off 314cdbefd1fd0a7acf3780e9628465b77ea6a836; > can you explain why head and tail must live on the same cache > line? Or is it just a space saver? I just ported it to ppc, > I didn't think about alternatives. spinlock_t should, ideally, be 32bits. > What about > > atomic_t tail; > volatile int head; ? > > Admittedly, that's usually 8 bytes instead of 4... That still won't straddle a cacheline unless you do weird alignement things which will bloat all the various data structures more still. Anyway, you can do a version with lwarx/stwcx if you're looking get rid of lharx.