From: Nicolin Chen <Guangyu.Chen@freescale.com>
To: Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ASoC: fsl_sai: Fix Bit Clock Polarity configurations
Date: Tue, 8 Apr 2014 19:07:40 +0800 [thread overview]
Message-ID: <20140408110738.GA10745@MrMyself> (raw)
In-Reply-To: <20140404100532.GN14763@sirena.org.uk>
On Fri, Apr 04, 2014 at 11:05:32AM +0100, Mark Brown wrote:
> On Fri, Apr 04, 2014 at 03:09:47PM +0800, Nicolin Chen wrote:
> > The BCP bit in TCR4/RCR4 register rules as followings:
> > 0 Bit clock is active high with drive outputs on rising edge
> > and sample inputs on falling edge.
> > 1 Bit clock is active low with drive outputs on falling edge
> > and sample inputs on rising edge.
>
> Applied, thanks.
Sir, I can't find this patch on any of the remote branches: for-next,
topic/fsl-sai and fix/fsl-sai. Where could I find it?
Thank you,
Nicolin
next prev parent reply other threads:[~2014-04-08 11:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-04 7:09 [PATCH] ASoC: fsl_sai: Fix Bit Clock Polarity configurations Nicolin Chen
2014-04-04 7:37 ` Li.Xiubo
2014-04-04 7:44 ` Nicolin Chen
2014-04-04 8:54 ` Li.Xiubo
2014-04-04 10:05 ` Mark Brown
2014-04-08 11:07 ` Nicolin Chen [this message]
2014-04-08 11:50 ` Mark Brown
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