[PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Jingchang Lu]

The IP is shared by PPC and ARM, this renames it to qoriq for better
represention, and this also adds the CLK_OF_DECLARE support for being
initialized by of_clk_init() on ARM.

Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
---
changes in v4:
 remove "corenet" literals omitted in v3 remove.

changes in v3:
 generate the patch with -M -C option

changes in v2:
 rename the driver name to ppc-qoriq.c for shared on PPC and ARM.

 drivers/clk/Kconfig                            |  9 +++++----
 drivers/clk/Makefile                           |  2 +-
 drivers/clk/{clk-ppc-corenet.c => clk-qoriq.c} | 27 +++++++++++++++-----------
 3 files changed, 22 insertions(+), 16 deletions(-)
 rename drivers/clk/{clk-ppc-corenet.c => clk-qoriq.c} (89%)

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 85131ae..f5f76cb 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -92,12 +92,13 @@ config COMMON_CLK_AXI_CLKGEN
 	  Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
 	  FPGAs. It is commonly used in Analog Devices' reference designs.
 
-config CLK_PPC_CORENET
-	bool "Clock driver for PowerPC corenet platforms"
-	depends on PPC_E500MC && OF
+config CLK_QORIQ
+	bool "Clock driver for PowerPC corenet and compatible ARM-based platforms"
+	depends on (PPC_E500MC || ARM) && OF
 	---help---
 	  This adds the clock driver support for Freescale PowerPC corenet
-	  platforms using common clock framework.
+	  platforms and compatible Freescale ARM based platforms using common
+	  clock framework.
 
 config COMMON_CLK_XGENE
 	bool "Clock driver for APM XGene SoC"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 27c542b..20f42e9 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_ARCH_MOXART)		+= clk-moxart.o
 obj-$(CONFIG_ARCH_NOMADIK)		+= clk-nomadik.o
 obj-$(CONFIG_ARCH_NSPIRE)		+= clk-nspire.o
 obj-$(CONFIG_COMMON_CLK_PALMAS)		+= clk-palmas.o
-obj-$(CONFIG_CLK_PPC_CORENET)		+= clk-ppc-corenet.o
+obj-$(CONFIG_CLK_QORIQ)			+= clk-qoriq.o
 obj-$(CONFIG_COMMON_CLK_S2MPS11)	+= clk-s2mps11.o
 obj-$(CONFIG_COMMON_CLK_SI5351)		+= clk-si5351.o
 obj-$(CONFIG_COMMON_CLK_SI570)		+= clk-si570.o
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-qoriq.c
similarity index 89%
rename from drivers/clk/clk-ppc-corenet.c
rename to drivers/clk/clk-qoriq.c
index 8e58edf..cba8abe 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-qoriq.c
@@ -155,7 +155,7 @@ static void __init core_pll_init(struct device_node *np)
 
 	base = of_iomap(np, 0);
 	if (!base) {
-		pr_err("clk-ppc: iomap error\n");
+		pr_err("clk-qoriq: iomap error\n");
 		return;
 	}
 
@@ -252,7 +252,7 @@ static void __init sysclk_init(struct device_node *node)
 	u32 rate;
 
 	if (!np) {
-		pr_err("ppc-clk: could not get parent node\n");
+		pr_err("qoriq-clk: could not get parent node\n");
 		return;
 	}
 
@@ -278,30 +278,35 @@ static const struct of_device_id clk_match[] __initconst = {
 	{}
 };
 
-static int __init ppc_corenet_clk_probe(struct platform_device *pdev)
+static int __init qoriq_clk_probe(struct platform_device *pdev)
 {
 	of_clk_init(clk_match);
 
 	return 0;
 }
 
-static const struct of_device_id ppc_clk_ids[] __initconst = {
+static const struct of_device_id qoriq_clk_ids[] __initconst = {
 	{ .compatible = "fsl,qoriq-clockgen-1.0", },
 	{ .compatible = "fsl,qoriq-clockgen-2.0", },
 	{}
 };
 
-static struct platform_driver ppc_corenet_clk_driver __initdata = {
+static struct platform_driver qoriq_clk_driver __initdata = {
 	.driver = {
-		.name = "ppc_corenet_clock",
+		.name = "qoriq_clock",
 		.owner = THIS_MODULE,
-		.of_match_table = ppc_clk_ids,
+		.of_match_table = qoriq_clk_ids,
 	},
-	.probe = ppc_corenet_clk_probe,
+	.probe = qoriq_clk_probe,
 };
 
-static int __init ppc_corenet_clk_init(void)
+static int __init qoriq_clk_init(void)
 {
-	return platform_driver_register(&ppc_corenet_clk_driver);
+	return platform_driver_register(&qoriq_clk_driver);
 }
-subsys_initcall(ppc_corenet_clk_init);
+subsys_initcall(qoriq_clk_init);
+
+CLK_OF_DECLARE(qoriq_core_pll_v1, "fsl,qoriq-core-pll-1.0", core_pll_init);
+CLK_OF_DECLARE(qoriq_core_pll_v2, "fsl,qoriq-core-pll-2.0", core_pll_init);
+CLK_OF_DECLARE(qoriq_core_mux_v1, "fsl,qoriq-core-mux-1.0", core_mux_init);
+CLK_OF_DECLARE(qoriq_core_mux_v2, "fsl,qoriq-core-mux-2.0", core_mux_init);
-- 
1.8.0

RE: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Jingchang Lu]

SGksIFNjb3R0IGFuZCBNaWtlLA0KICANCiAgQ291bGQgeW91IHBsZWFzZSBoZWxwIHJldmlldyB0
aGlzIHBhdGNoIGFuZCBnaXZlIGFuIEFDSyBpZiBvay4gVGhhbmtzLg0KDQpCZXN0IFJlZ2FyZHMs
DQpKaW5nY2hhbmcNCg0KPi0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+RnJvbTogSmluZ2No
YW5nIEx1IFttYWlsdG86amluZ2NoYW5nLmx1QGZyZWVzY2FsZS5jb21dDQo+U2VudDogVHVlc2Rh
eSwgU2VwdGVtYmVyIDIzLCAyMDE0IDI6NDcgUE0NCj5UbzogbXR1cnF1ZXR0ZUBsaW5hcm8ub3Jn
DQo+Q2M6IFdvb2QgU2NvdHQtQjA3NDIxOyBsaW51eHBwYy1kZXZAbGlzdHMub3psYWJzLm9yZzsg
bGludXgtDQo+a2VybmVsQHZnZXIua2VybmVsLm9yZzsgbGludXgtYXJtLWtlcm5lbEBsaXN0cy5p
bmZyYWRlYWQub3JnOyBMdQ0KPkppbmdjaGFuZy1CMzUwODMNCj5TdWJqZWN0OiBbUEFUQ0h2NF0g
Y2xrOiBwcGMtY29yZW5ldDogcmVuYW1lIHRvIHBwYy1xb3JpcSBhbmQgYWRkDQo+Q0xLX09GX0RF
Q0xBUkUgc3VwcG9ydA0KPg0KPlRoZSBJUCBpcyBzaGFyZWQgYnkgUFBDIGFuZCBBUk0sIHRoaXMg
cmVuYW1lcyBpdCB0byBxb3JpcSBmb3IgYmV0dGVyDQo+cmVwcmVzZW50aW9uLCBhbmQgdGhpcyBh
bHNvIGFkZHMgdGhlIENMS19PRl9ERUNMQVJFIHN1cHBvcnQgZm9yIGJlaW5nDQo+aW5pdGlhbGl6
ZWQgYnkgb2ZfY2xrX2luaXQoKSBvbiBBUk0uDQo+DQo+U2lnbmVkLW9mZi1ieTogSmluZ2NoYW5n
IEx1IDxqaW5nY2hhbmcubHVAZnJlZXNjYWxlLmNvbT4NCj4tLS0NCj5jaGFuZ2VzIGluIHY0Og0K
PiByZW1vdmUgImNvcmVuZXQiIGxpdGVyYWxzIG9taXR0ZWQgaW4gdjMgcmVtb3ZlLg0KPg0KPmNo
YW5nZXMgaW4gdjM6DQo+IGdlbmVyYXRlIHRoZSBwYXRjaCB3aXRoIC1NIC1DIG9wdGlvbg0KPg0K
PmNoYW5nZXMgaW4gdjI6DQo+IHJlbmFtZSB0aGUgZHJpdmVyIG5hbWUgdG8gcHBjLXFvcmlxLmMg
Zm9yIHNoYXJlZCBvbiBQUEMgYW5kIEFSTS4NCj4NCj4gZHJpdmVycy9jbGsvS2NvbmZpZyAgICAg
ICAgICAgICAgICAgICAgICAgICAgICB8ICA5ICsrKysrLS0tLQ0KPiBkcml2ZXJzL2Nsay9NYWtl
ZmlsZSAgICAgICAgICAgICAgICAgICAgICAgICAgIHwgIDIgKy0NCj4gZHJpdmVycy9jbGsve2Ns
ay1wcGMtY29yZW5ldC5jID0+IGNsay1xb3JpcS5jfSB8IDI3ICsrKysrKysrKysrKysrKy0tLS0t
LQ0KPi0tLS0tDQo+IDMgZmlsZXMgY2hhbmdlZCwgMjIgaW5zZXJ0aW9ucygrKSwgMTYgZGVsZXRp
b25zKC0pICByZW5hbWUNCj5kcml2ZXJzL2Nsay97Y2xrLXBwYy1jb3JlbmV0LmMgPT4gY2xrLXFv
cmlxLmN9ICg4OSUpDQo+DQo+ZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL0tjb25maWcgYi9kcml2
ZXJzL2Nsay9LY29uZmlnIGluZGV4DQo+ODUxMzFhZS4uZjVmNzZjYiAxMDA2NDQNCj4tLS0gYS9k
cml2ZXJzL2Nsay9LY29uZmlnDQo+KysrIGIvZHJpdmVycy9jbGsvS2NvbmZpZw0KPkBAIC05Miwx
MiArOTIsMTMgQEAgY29uZmlnIENPTU1PTl9DTEtfQVhJX0NMS0dFTg0KPiAJICBTdXBwb3J0IGZv
ciB0aGUgQW5hbG9nIERldmljZXMgYXhpLWNsa2dlbiBwY29yZSBjbG9jayBnZW5lcmF0b3INCj5m
b3IgWGlsaW54DQo+IAkgIEZQR0FzLiBJdCBpcyBjb21tb25seSB1c2VkIGluIEFuYWxvZyBEZXZp
Y2VzJyByZWZlcmVuY2UgZGVzaWducy4NCj4NCj4tY29uZmlnIENMS19QUENfQ09SRU5FVA0KPi0J
Ym9vbCAiQ2xvY2sgZHJpdmVyIGZvciBQb3dlclBDIGNvcmVuZXQgcGxhdGZvcm1zIg0KPi0JZGVw
ZW5kcyBvbiBQUENfRTUwME1DICYmIE9GDQo+K2NvbmZpZyBDTEtfUU9SSVENCj4rCWJvb2wgIkNs
b2NrIGRyaXZlciBmb3IgUG93ZXJQQyBjb3JlbmV0IGFuZCBjb21wYXRpYmxlIEFSTS1iYXNlZA0K
PnBsYXRmb3JtcyINCj4rCWRlcGVuZHMgb24gKFBQQ19FNTAwTUMgfHwgQVJNKSAmJiBPRg0KPiAJ
LS0taGVscC0tLQ0KPiAJICBUaGlzIGFkZHMgdGhlIGNsb2NrIGRyaXZlciBzdXBwb3J0IGZvciBG
cmVlc2NhbGUgUG93ZXJQQyBjb3JlbmV0DQo+LQkgIHBsYXRmb3JtcyB1c2luZyBjb21tb24gY2xv
Y2sgZnJhbWV3b3JrLg0KPisJICBwbGF0Zm9ybXMgYW5kIGNvbXBhdGlibGUgRnJlZXNjYWxlIEFS
TSBiYXNlZCBwbGF0Zm9ybXMgdXNpbmcNCj5jb21tb24NCj4rCSAgY2xvY2sgZnJhbWV3b3JrLg0K
Pg0KPiBjb25maWcgQ09NTU9OX0NMS19YR0VORQ0KPiAJYm9vbCAiQ2xvY2sgZHJpdmVyIGZvciBB
UE0gWEdlbmUgU29DIg0KPmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9NYWtlZmlsZSBiL2RyaXZl
cnMvY2xrL01ha2VmaWxlIGluZGV4DQo+MjdjNTQyYi4uMjBmNDJlOSAxMDA2NDQNCj4tLS0gYS9k
cml2ZXJzL2Nsay9NYWtlZmlsZQ0KPisrKyBiL2RyaXZlcnMvY2xrL01ha2VmaWxlDQo+QEAgLTI5
LDcgKzI5LDcgQEAgb2JqLSQoQ09ORklHX0FSQ0hfTU9YQVJUKQkJKz0gY2xrLW1veGFydC5vDQo+
IG9iai0kKENPTkZJR19BUkNIX05PTUFESUspCQkrPSBjbGstbm9tYWRpay5vDQo+IG9iai0kKENP
TkZJR19BUkNIX05TUElSRSkJCSs9IGNsay1uc3BpcmUubw0KPiBvYmotJChDT05GSUdfQ09NTU9O
X0NMS19QQUxNQVMpCQkrPSBjbGstcGFsbWFzLm8NCj4tb2JqLSQoQ09ORklHX0NMS19QUENfQ09S
RU5FVCkJCSs9IGNsay1wcGMtY29yZW5ldC5vDQo+K29iai0kKENPTkZJR19DTEtfUU9SSVEpCQkJ
Kz0gY2xrLXFvcmlxLm8NCj4gb2JqLSQoQ09ORklHX0NPTU1PTl9DTEtfUzJNUFMxMSkJKz0gY2xr
LXMybXBzMTEubw0KPiBvYmotJChDT05GSUdfQ09NTU9OX0NMS19TSTUzNTEpCQkrPSBjbGstc2k1
MzUxLm8NCj4gb2JqLSQoQ09ORklHX0NPTU1PTl9DTEtfU0k1NzApCQkrPSBjbGstc2k1NzAubw0K
PmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9jbGstcHBjLWNvcmVuZXQuYyBiL2RyaXZlcnMvY2xr
L2Nsay1xb3JpcS5jDQo+c2ltaWxhcml0eSBpbmRleCA4OSUgcmVuYW1lIGZyb20gZHJpdmVycy9j
bGsvY2xrLXBwYy1jb3JlbmV0LmMgcmVuYW1lIHRvDQo+ZHJpdmVycy9jbGsvY2xrLXFvcmlxLmMg
aW5kZXggOGU1OGVkZi4uY2JhOGFiZSAxMDA2NDQNCj4tLS0gYS9kcml2ZXJzL2Nsay9jbGstcHBj
LWNvcmVuZXQuYw0KPisrKyBiL2RyaXZlcnMvY2xrL2Nsay1xb3JpcS5jDQo+QEAgLTE1NSw3ICsx
NTUsNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgY29yZV9wbGxfaW5pdChzdHJ1Y3QgZGV2aWNlX25v
ZGUNCj4qbnApDQo+DQo+IAliYXNlID0gb2ZfaW9tYXAobnAsIDApOw0KPiAJaWYgKCFiYXNlKSB7
DQo+LQkJcHJfZXJyKCJjbGstcHBjOiBpb21hcCBlcnJvclxuIik7DQo+KwkJcHJfZXJyKCJjbGst
cW9yaXE6IGlvbWFwIGVycm9yXG4iKTsNCj4gCQlyZXR1cm47DQo+IAl9DQo+DQo+QEAgLTI1Miw3
ICsyNTIsNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgc3lzY2xrX2luaXQoc3RydWN0IGRldmljZV9u
b2RlDQo+Km5vZGUpDQo+IAl1MzIgcmF0ZTsNCj4NCj4gCWlmICghbnApIHsNCj4tCQlwcl9lcnIo
InBwYy1jbGs6IGNvdWxkIG5vdCBnZXQgcGFyZW50IG5vZGVcbiIpOw0KPisJCXByX2VycigicW9y
aXEtY2xrOiBjb3VsZCBub3QgZ2V0IHBhcmVudCBub2RlXG4iKTsNCj4gCQlyZXR1cm47DQo+IAl9
DQo+DQo+QEAgLTI3OCwzMCArMjc4LDM1IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3Qgb2ZfZGV2aWNl
X2lkIGNsa19tYXRjaFtdDQo+X19pbml0Y29uc3QgPSB7DQo+IAl7fQ0KPiB9Ow0KPg0KPi1zdGF0
aWMgaW50IF9faW5pdCBwcGNfY29yZW5ldF9jbGtfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2Rldmlj
ZSAqcGRldikNCj4rc3RhdGljIGludCBfX2luaXQgcW9yaXFfY2xrX3Byb2JlKHN0cnVjdCBwbGF0
Zm9ybV9kZXZpY2UgKnBkZXYpDQo+IHsNCj4gCW9mX2Nsa19pbml0KGNsa19tYXRjaCk7DQo+DQo+
IAlyZXR1cm4gMDsNCj4gfQ0KPg0KPi1zdGF0aWMgY29uc3Qgc3RydWN0IG9mX2RldmljZV9pZCBw
cGNfY2xrX2lkc1tdIF9faW5pdGNvbnN0ID0gew0KPitzdGF0aWMgY29uc3Qgc3RydWN0IG9mX2Rl
dmljZV9pZCBxb3JpcV9jbGtfaWRzW10gX19pbml0Y29uc3QgPSB7DQo+IAl7IC5jb21wYXRpYmxl
ID0gImZzbCxxb3JpcS1jbG9ja2dlbi0xLjAiLCB9LA0KPiAJeyAuY29tcGF0aWJsZSA9ICJmc2ws
cW9yaXEtY2xvY2tnZW4tMi4wIiwgfSwNCj4gCXt9DQo+IH07DQo+DQo+LXN0YXRpYyBzdHJ1Y3Qg
cGxhdGZvcm1fZHJpdmVyIHBwY19jb3JlbmV0X2Nsa19kcml2ZXIgX19pbml0ZGF0YSA9IHsNCj4r
c3RhdGljIHN0cnVjdCBwbGF0Zm9ybV9kcml2ZXIgcW9yaXFfY2xrX2RyaXZlciBfX2luaXRkYXRh
ID0gew0KPiAJLmRyaXZlciA9IHsNCj4tCQkubmFtZSA9ICJwcGNfY29yZW5ldF9jbG9jayIsDQo+
KwkJLm5hbWUgPSAicW9yaXFfY2xvY2siLA0KPiAJCS5vd25lciA9IFRISVNfTU9EVUxFLA0KPi0J
CS5vZl9tYXRjaF90YWJsZSA9IHBwY19jbGtfaWRzLA0KPisJCS5vZl9tYXRjaF90YWJsZSA9IHFv
cmlxX2Nsa19pZHMsDQo+IAl9LA0KPi0JLnByb2JlID0gcHBjX2NvcmVuZXRfY2xrX3Byb2JlLA0K
PisJLnByb2JlID0gcW9yaXFfY2xrX3Byb2JlLA0KPiB9Ow0KPg0KPi1zdGF0aWMgaW50IF9faW5p
dCBwcGNfY29yZW5ldF9jbGtfaW5pdCh2b2lkKQ0KPitzdGF0aWMgaW50IF9faW5pdCBxb3JpcV9j
bGtfaW5pdCh2b2lkKQ0KPiB7DQo+LQlyZXR1cm4gcGxhdGZvcm1fZHJpdmVyX3JlZ2lzdGVyKCZw
cGNfY29yZW5ldF9jbGtfZHJpdmVyKTsNCj4rCXJldHVybiBwbGF0Zm9ybV9kcml2ZXJfcmVnaXN0
ZXIoJnFvcmlxX2Nsa19kcml2ZXIpOw0KPiB9DQo+LXN1YnN5c19pbml0Y2FsbChwcGNfY29yZW5l
dF9jbGtfaW5pdCk7DQo+K3N1YnN5c19pbml0Y2FsbChxb3JpcV9jbGtfaW5pdCk7DQo+Kw0KPitD
TEtfT0ZfREVDTEFSRShxb3JpcV9jb3JlX3BsbF92MSwgImZzbCxxb3JpcS1jb3JlLXBsbC0xLjAi
LA0KPitjb3JlX3BsbF9pbml0KTsgQ0xLX09GX0RFQ0xBUkUocW9yaXFfY29yZV9wbGxfdjIsDQo+
KyJmc2wscW9yaXEtY29yZS1wbGwtMi4wIiwgY29yZV9wbGxfaW5pdCk7DQo+K0NMS19PRl9ERUNM
QVJFKHFvcmlxX2NvcmVfbXV4X3YxLCAiZnNsLHFvcmlxLWNvcmUtbXV4LTEuMCIsDQo+K2NvcmVf
bXV4X2luaXQpOyBDTEtfT0ZfREVDTEFSRShxb3JpcV9jb3JlX211eF92MiwNCj4rImZzbCxxb3Jp
cS1jb3JlLW11eC0yLjAiLCBjb3JlX211eF9pbml0KTsNCj4tLQ0KPjEuOC4wDQoNCg==

Re: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Laurentiu Tudor]

Hi Jingchang,

On 09/23/2014 09:46 AM, Jingchang Lu wrote:
> The IP is shared by PPC and ARM, this renames it to qoriq for better
> represention, and this also adds the CLK_OF_DECLARE support for being
> initialized by of_clk_init() on ARM.
> 

I think you need to also update drivers/cpufreq/Kconfig.powerpc
to use the renamed config option.

---
Best Regards, Laurentiu

Re: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Scott Wood]

Well, like I said, I'd rather see the CLK_OF_DECLARE stuff be made to
work on PPC rather than have the driver carry around two binding
methods.

-Scott

On Thu, 2014-09-25 at 04:47 -0500, Lu Jingchang-B35083 wrote:
> Hi, Scott and Mike,
>   
>   Could you please help review this patch and give an ACK if ok. Thanks.
> 
> Best Regards,
> Jingchang
> 
> >-----Original Message-----
> >From: Jingchang Lu [mailto:jingchang.lu@freescale.com]
> >Sent: Tuesday, September 23, 2014 2:47 PM
> >To: mturquette@linaro.org
> >Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; linux-
> >kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Lu
> >Jingchang-B35083
> >Subject: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add
> >CLK_OF_DECLARE support
> >
> >The IP is shared by PPC and ARM, this renames it to qoriq for better
> >represention, and this also adds the CLK_OF_DECLARE support for being
> >initialized by of_clk_init() on ARM.
> >
> >Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
> >---
> >changes in v4:
> > remove "corenet" literals omitted in v3 remove.
> >
> >changes in v3:
> > generate the patch with -M -C option
> >
> >changes in v2:
> > rename the driver name to ppc-qoriq.c for shared on PPC and ARM.
> >
> > drivers/clk/Kconfig                            |  9 +++++----
> > drivers/clk/Makefile                           |  2 +-
> > drivers/clk/{clk-ppc-corenet.c => clk-qoriq.c} | 27 +++++++++++++++------
> >-----
> > 3 files changed, 22 insertions(+), 16 deletions(-)  rename
> >drivers/clk/{clk-ppc-corenet.c => clk-qoriq.c} (89%)
> >
> >diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index
> >85131ae..f5f76cb 100644
> >--- a/drivers/clk/Kconfig
> >+++ b/drivers/clk/Kconfig
> >@@ -92,12 +92,13 @@ config COMMON_CLK_AXI_CLKGEN
> > 	  Support for the Analog Devices axi-clkgen pcore clock generator
> >for Xilinx
> > 	  FPGAs. It is commonly used in Analog Devices' reference designs.
> >
> >-config CLK_PPC_CORENET
> >-	bool "Clock driver for PowerPC corenet platforms"
> >-	depends on PPC_E500MC && OF
> >+config CLK_QORIQ
> >+	bool "Clock driver for PowerPC corenet and compatible ARM-based
> >platforms"
> >+	depends on (PPC_E500MC || ARM) && OF
> > 	---help---
> > 	  This adds the clock driver support for Freescale PowerPC corenet
> >-	  platforms using common clock framework.
> >+	  platforms and compatible Freescale ARM based platforms using
> >common
> >+	  clock framework.
> >
> > config COMMON_CLK_XGENE
> > 	bool "Clock driver for APM XGene SoC"
> >diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index
> >27c542b..20f42e9 100644
> >--- a/drivers/clk/Makefile
> >+++ b/drivers/clk/Makefile
> >@@ -29,7 +29,7 @@ obj-$(CONFIG_ARCH_MOXART)		+= clk-moxart.o
> > obj-$(CONFIG_ARCH_NOMADIK)		+= clk-nomadik.o
> > obj-$(CONFIG_ARCH_NSPIRE)		+= clk-nspire.o
> > obj-$(CONFIG_COMMON_CLK_PALMAS)		+= clk-palmas.o
> >-obj-$(CONFIG_CLK_PPC_CORENET)		+= clk-ppc-corenet.o
> >+obj-$(CONFIG_CLK_QORIQ)			+= clk-qoriq.o
> > obj-$(CONFIG_COMMON_CLK_S2MPS11)	+= clk-s2mps11.o
> > obj-$(CONFIG_COMMON_CLK_SI5351)		+= clk-si5351.o
> > obj-$(CONFIG_COMMON_CLK_SI570)		+= clk-si570.o
> >diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-qoriq.c
> >similarity index 89% rename from drivers/clk/clk-ppc-corenet.c rename to
> >drivers/clk/clk-qoriq.c index 8e58edf..cba8abe 100644
> >--- a/drivers/clk/clk-ppc-corenet.c
> >+++ b/drivers/clk/clk-qoriq.c
> >@@ -155,7 +155,7 @@ static void __init core_pll_init(struct device_node
> >*np)
> >
> > 	base = of_iomap(np, 0);
> > 	if (!base) {
> >-		pr_err("clk-ppc: iomap error\n");
> >+		pr_err("clk-qoriq: iomap error\n");
> > 		return;
> > 	}
> >
> >@@ -252,7 +252,7 @@ static void __init sysclk_init(struct device_node
> >*node)
> > 	u32 rate;
> >
> > 	if (!np) {
> >-		pr_err("ppc-clk: could not get parent node\n");
> >+		pr_err("qoriq-clk: could not get parent node\n");
> > 		return;
> > 	}
> >
> >@@ -278,30 +278,35 @@ static const struct of_device_id clk_match[]
> >__initconst = {
> > 	{}
> > };
> >
> >-static int __init ppc_corenet_clk_probe(struct platform_device *pdev)
> >+static int __init qoriq_clk_probe(struct platform_device *pdev)
> > {
> > 	of_clk_init(clk_match);
> >
> > 	return 0;
> > }
> >
> >-static const struct of_device_id ppc_clk_ids[] __initconst = {
> >+static const struct of_device_id qoriq_clk_ids[] __initconst = {
> > 	{ .compatible = "fsl,qoriq-clockgen-1.0", },
> > 	{ .compatible = "fsl,qoriq-clockgen-2.0", },
> > 	{}
> > };
> >
> >-static struct platform_driver ppc_corenet_clk_driver __initdata = {
> >+static struct platform_driver qoriq_clk_driver __initdata = {
> > 	.driver = {
> >-		.name = "ppc_corenet_clock",
> >+		.name = "qoriq_clock",
> > 		.owner = THIS_MODULE,
> >-		.of_match_table = ppc_clk_ids,
> >+		.of_match_table = qoriq_clk_ids,
> > 	},
> >-	.probe = ppc_corenet_clk_probe,
> >+	.probe = qoriq_clk_probe,
> > };
> >
> >-static int __init ppc_corenet_clk_init(void)
> >+static int __init qoriq_clk_init(void)
> > {
> >-	return platform_driver_register(&ppc_corenet_clk_driver);
> >+	return platform_driver_register(&qoriq_clk_driver);
> > }
> >-subsys_initcall(ppc_corenet_clk_init);
> >+subsys_initcall(qoriq_clk_init);
> >+
> >+CLK_OF_DECLARE(qoriq_core_pll_v1, "fsl,qoriq-core-pll-1.0",
> >+core_pll_init); CLK_OF_DECLARE(qoriq_core_pll_v2,
> >+"fsl,qoriq-core-pll-2.0", core_pll_init);
> >+CLK_OF_DECLARE(qoriq_core_mux_v1, "fsl,qoriq-core-mux-1.0",
> >+core_mux_init); CLK_OF_DECLARE(qoriq_core_mux_v2,
> >+"fsl,qoriq-core-mux-2.0", core_mux_init);
> >--
> >1.8.0
> 

Re: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Mike Turquette]

Quoting Jingchang Lu (2014-09-22 23:46:46)
> The IP is shared by PPC and ARM, this renames it to qoriq for better
> represention, and this also adds the CLK_OF_DECLARE support for being
> initialized by of_clk_init() on ARM.
> =

> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
> ---
> changes in v4:
>  remove "corenet" literals omitted in v3 remove.
> =

> changes in v3:
>  generate the patch with -M -C option
> =

> changes in v2:
>  rename the driver name to ppc-qoriq.c for shared on PPC and ARM.
> =

>  drivers/clk/Kconfig                            |  9 +++++----
>  drivers/clk/Makefile                           |  2 +-
>  drivers/clk/{clk-ppc-corenet.c =3D> clk-qoriq.c} | 27 +++++++++++++++---=
--------
>  3 files changed, 22 insertions(+), 16 deletions(-)
>  rename drivers/clk/{clk-ppc-corenet.c =3D> clk-qoriq.c} (89%)
> =

> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 85131ae..f5f76cb 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -92,12 +92,13 @@ config COMMON_CLK_AXI_CLKGEN
>           Support for the Analog Devices axi-clkgen pcore clock generator=
 for Xilinx
>           FPGAs. It is commonly used in Analog Devices' reference designs.
>  =

> -config CLK_PPC_CORENET
> -       bool "Clock driver for PowerPC corenet platforms"
> -       depends on PPC_E500MC && OF
> +config CLK_QORIQ
> +       bool "Clock driver for PowerPC corenet and compatible ARM-based p=
latforms"
> +       depends on (PPC_E500MC || ARM) && OF
>         ---help---
>           This adds the clock driver support for Freescale PowerPC corenet
> -         platforms using common clock framework.
> +         platforms and compatible Freescale ARM based platforms using co=
mmon
> +         clock framework.
>  =

>  config COMMON_CLK_XGENE
>         bool "Clock driver for APM XGene SoC"
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index 27c542b..20f42e9 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -29,7 +29,7 @@ obj-$(CONFIG_ARCH_MOXART)             +=3D clk-moxart.o
>  obj-$(CONFIG_ARCH_NOMADIK)             +=3D clk-nomadik.o
>  obj-$(CONFIG_ARCH_NSPIRE)              +=3D clk-nspire.o
>  obj-$(CONFIG_COMMON_CLK_PALMAS)                +=3D clk-palmas.o
> -obj-$(CONFIG_CLK_PPC_CORENET)          +=3D clk-ppc-corenet.o
> +obj-$(CONFIG_CLK_QORIQ)                        +=3D clk-qoriq.o
>  obj-$(CONFIG_COMMON_CLK_S2MPS11)       +=3D clk-s2mps11.o
>  obj-$(CONFIG_COMMON_CLK_SI5351)                +=3D clk-si5351.o
>  obj-$(CONFIG_COMMON_CLK_SI570)         +=3D clk-si570.o
> diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-qoriq.c
> similarity index 89%
> rename from drivers/clk/clk-ppc-corenet.c
> rename to drivers/clk/clk-qoriq.c
> index 8e58edf..cba8abe 100644
> --- a/drivers/clk/clk-ppc-corenet.c
> +++ b/drivers/clk/clk-qoriq.c
> @@ -155,7 +155,7 @@ static void __init core_pll_init(struct device_node *=
np)
>  =

>         base =3D of_iomap(np, 0);
>         if (!base) {
> -               pr_err("clk-ppc: iomap error\n");
> +               pr_err("clk-qoriq: iomap error\n");
>                 return;
>         }
>  =

> @@ -252,7 +252,7 @@ static void __init sysclk_init(struct device_node *no=
de)
>         u32 rate;
>  =

>         if (!np) {
> -               pr_err("ppc-clk: could not get parent node\n");
> +               pr_err("qoriq-clk: could not get parent node\n");
>                 return;
>         }
>  =

> @@ -278,30 +278,35 @@ static const struct of_device_id clk_match[] __init=
const =3D {
>         {}
>  };
>  =

> -static int __init ppc_corenet_clk_probe(struct platform_device *pdev)
> +static int __init qoriq_clk_probe(struct platform_device *pdev)
>  {
>         of_clk_init(clk_match);
>  =

>         return 0;
>  }
>  =

> -static const struct of_device_id ppc_clk_ids[] __initconst =3D {
> +static const struct of_device_id qoriq_clk_ids[] __initconst =3D {
>         { .compatible =3D "fsl,qoriq-clockgen-1.0", },
>         { .compatible =3D "fsl,qoriq-clockgen-2.0", },
>         {}
>  };
>  =

> -static struct platform_driver ppc_corenet_clk_driver __initdata =3D {
> +static struct platform_driver qoriq_clk_driver __initdata =3D {
>         .driver =3D {
> -               .name =3D "ppc_corenet_clock",
> +               .name =3D "qoriq_clock",
>                 .owner =3D THIS_MODULE,
> -               .of_match_table =3D ppc_clk_ids,
> +               .of_match_table =3D qoriq_clk_ids,
>         },
> -       .probe =3D ppc_corenet_clk_probe,
> +       .probe =3D qoriq_clk_probe,
>  };
>  =

> -static int __init ppc_corenet_clk_init(void)
> +static int __init qoriq_clk_init(void)
>  {
> -       return platform_driver_register(&ppc_corenet_clk_driver);
> +       return platform_driver_register(&qoriq_clk_driver);
>  }
> -subsys_initcall(ppc_corenet_clk_init);
> +subsys_initcall(qoriq_clk_init);
> +
> +CLK_OF_DECLARE(qoriq_core_pll_v1, "fsl,qoriq-core-pll-1.0", core_pll_ini=
t);
> +CLK_OF_DECLARE(qoriq_core_pll_v2, "fsl,qoriq-core-pll-2.0", core_pll_ini=
t);
> +CLK_OF_DECLARE(qoriq_core_mux_v1, "fsl,qoriq-core-mux-1.0", core_mux_ini=
t);
> +CLK_OF_DECLARE(qoriq_core_mux_v2, "fsl,qoriq-core-mux-2.0", core_mux_ini=
t);

Is there binding documentation for these compatibles?

Regards,
Mike

> -- =

> 1.8.0
>=20

Re: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Scott Wood]

On Thu, 2014-09-25 at 14:39 -0700, Mike Turquette wrote:
> Quoting Jingchang Lu (2014-09-22 23:46:46)
> > +CLK_OF_DECLARE(qoriq_core_pll_v1, "fsl,qoriq-core-pll-1.0", core_pll_init);
> > +CLK_OF_DECLARE(qoriq_core_pll_v2, "fsl,qoriq-core-pll-2.0", core_pll_init);
> > +CLK_OF_DECLARE(qoriq_core_mux_v1, "fsl,qoriq-core-mux-1.0", core_mux_init);
> > +CLK_OF_DECLARE(qoriq_core_mux_v2, "fsl,qoriq-core-mux-2.0", core_mux_init);
> 
> Is there binding documentation for these compatibles?

Documentation/devicetree/bindings/clock/qoriq-clock.txt

-Scott

Re: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Mike Turquette]

Quoting Scott Wood (2014-09-25 13:08:00)
> Well, like I said, I'd rather see the CLK_OF_DECLARE stuff be made to
> work on PPC rather than have the driver carry around two binding
> methods.

I guess that is an existing problem, and not related directly to this
patch? This patch is essentially just renames (though the V1.0/V2.0
stuff seems weird).

Regards,
Mike

> =

> -Scott
> =

> On Thu, 2014-09-25 at 04:47 -0500, Lu Jingchang-B35083 wrote:
> > Hi, Scott and Mike,
> >   =

> >   Could you please help review this patch and give an ACK if ok. Thanks.
> > =

> > Best Regards,
> > Jingchang
> > =

> > >-----Original Message-----
> > >From: Jingchang Lu [mailto:jingchang.lu@freescale.com]
> > >Sent: Tuesday, September 23, 2014 2:47 PM
> > >To: mturquette@linaro.org
> > >Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; linux-
> > >kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Lu
> > >Jingchang-B35083
> > >Subject: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add
> > >CLK_OF_DECLARE support
> > >
> > >The IP is shared by PPC and ARM, this renames it to qoriq for better
> > >represention, and this also adds the CLK_OF_DECLARE support for being
> > >initialized by of_clk_init() on ARM.
> > >
> > >Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
> > >---
> > >changes in v4:
> > > remove "corenet" literals omitted in v3 remove.
> > >
> > >changes in v3:
> > > generate the patch with -M -C option
> > >
> > >changes in v2:
> > > rename the driver name to ppc-qoriq.c for shared on PPC and ARM.
> > >
> > > drivers/clk/Kconfig                            |  9 +++++----
> > > drivers/clk/Makefile                           |  2 +-
> > > drivers/clk/{clk-ppc-corenet.c =3D> clk-qoriq.c} | 27 +++++++++++++++=
------
> > >-----
> > > 3 files changed, 22 insertions(+), 16 deletions(-)  rename
> > >drivers/clk/{clk-ppc-corenet.c =3D> clk-qoriq.c} (89%)
> > >
> > >diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index
> > >85131ae..f5f76cb 100644
> > >--- a/drivers/clk/Kconfig
> > >+++ b/drivers/clk/Kconfig
> > >@@ -92,12 +92,13 @@ config COMMON_CLK_AXI_CLKGEN
> > >       Support for the Analog Devices axi-clkgen pcore clock generator
> > >for Xilinx
> > >       FPGAs. It is commonly used in Analog Devices' reference designs.
> > >
> > >-config CLK_PPC_CORENET
> > >-    bool "Clock driver for PowerPC corenet platforms"
> > >-    depends on PPC_E500MC && OF
> > >+config CLK_QORIQ
> > >+    bool "Clock driver for PowerPC corenet and compatible ARM-based
> > >platforms"
> > >+    depends on (PPC_E500MC || ARM) && OF
> > >     ---help---
> > >       This adds the clock driver support for Freescale PowerPC corenet
> > >-      platforms using common clock framework.
> > >+      platforms and compatible Freescale ARM based platforms using
> > >common
> > >+      clock framework.
> > >
> > > config COMMON_CLK_XGENE
> > >     bool "Clock driver for APM XGene SoC"
> > >diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index
> > >27c542b..20f42e9 100644
> > >--- a/drivers/clk/Makefile
> > >+++ b/drivers/clk/Makefile
> > >@@ -29,7 +29,7 @@ obj-$(CONFIG_ARCH_MOXART)          +=3D clk-moxart.o
> > > obj-$(CONFIG_ARCH_NOMADIK)          +=3D clk-nomadik.o
> > > obj-$(CONFIG_ARCH_NSPIRE)           +=3D clk-nspire.o
> > > obj-$(CONFIG_COMMON_CLK_PALMAS)             +=3D clk-palmas.o
> > >-obj-$(CONFIG_CLK_PPC_CORENET)               +=3D clk-ppc-corenet.o
> > >+obj-$(CONFIG_CLK_QORIQ)                     +=3D clk-qoriq.o
> > > obj-$(CONFIG_COMMON_CLK_S2MPS11)    +=3D clk-s2mps11.o
> > > obj-$(CONFIG_COMMON_CLK_SI5351)             +=3D clk-si5351.o
> > > obj-$(CONFIG_COMMON_CLK_SI570)              +=3D clk-si570.o
> > >diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-qoriq.c
> > >similarity index 89% rename from drivers/clk/clk-ppc-corenet.c rename =
to
> > >drivers/clk/clk-qoriq.c index 8e58edf..cba8abe 100644
> > >--- a/drivers/clk/clk-ppc-corenet.c
> > >+++ b/drivers/clk/clk-qoriq.c
> > >@@ -155,7 +155,7 @@ static void __init core_pll_init(struct device_node
> > >*np)
> > >
> > >     base =3D of_iomap(np, 0);
> > >     if (!base) {
> > >-            pr_err("clk-ppc: iomap error\n");
> > >+            pr_err("clk-qoriq: iomap error\n");
> > >             return;
> > >     }
> > >
> > >@@ -252,7 +252,7 @@ static void __init sysclk_init(struct device_node
> > >*node)
> > >     u32 rate;
> > >
> > >     if (!np) {
> > >-            pr_err("ppc-clk: could not get parent node\n");
> > >+            pr_err("qoriq-clk: could not get parent node\n");
> > >             return;
> > >     }
> > >
> > >@@ -278,30 +278,35 @@ static const struct of_device_id clk_match[]
> > >__initconst =3D {
> > >     {}
> > > };
> > >
> > >-static int __init ppc_corenet_clk_probe(struct platform_device *pdev)
> > >+static int __init qoriq_clk_probe(struct platform_device *pdev)
> > > {
> > >     of_clk_init(clk_match);
> > >
> > >     return 0;
> > > }
> > >
> > >-static const struct of_device_id ppc_clk_ids[] __initconst =3D {
> > >+static const struct of_device_id qoriq_clk_ids[] __initconst =3D {
> > >     { .compatible =3D "fsl,qoriq-clockgen-1.0", },
> > >     { .compatible =3D "fsl,qoriq-clockgen-2.0", },
> > >     {}
> > > };
> > >
> > >-static struct platform_driver ppc_corenet_clk_driver __initdata =3D {
> > >+static struct platform_driver qoriq_clk_driver __initdata =3D {
> > >     .driver =3D {
> > >-            .name =3D "ppc_corenet_clock",
> > >+            .name =3D "qoriq_clock",
> > >             .owner =3D THIS_MODULE,
> > >-            .of_match_table =3D ppc_clk_ids,
> > >+            .of_match_table =3D qoriq_clk_ids,
> > >     },
> > >-    .probe =3D ppc_corenet_clk_probe,
> > >+    .probe =3D qoriq_clk_probe,
> > > };
> > >
> > >-static int __init ppc_corenet_clk_init(void)
> > >+static int __init qoriq_clk_init(void)
> > > {
> > >-    return platform_driver_register(&ppc_corenet_clk_driver);
> > >+    return platform_driver_register(&qoriq_clk_driver);
> > > }
> > >-subsys_initcall(ppc_corenet_clk_init);
> > >+subsys_initcall(qoriq_clk_init);
> > >+
> > >+CLK_OF_DECLARE(qoriq_core_pll_v1, "fsl,qoriq-core-pll-1.0",
> > >+core_pll_init); CLK_OF_DECLARE(qoriq_core_pll_v2,
> > >+"fsl,qoriq-core-pll-2.0", core_pll_init);
> > >+CLK_OF_DECLARE(qoriq_core_mux_v1, "fsl,qoriq-core-mux-1.0",
> > >+core_mux_init); CLK_OF_DECLARE(qoriq_core_mux_v2,
> > >+"fsl,qoriq-core-mux-2.0", core_mux_init);
> > >--
> > >1.8.0
> > =

> =

>=20

Re: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Scott Wood]

On Thu, 2014-09-25 at 15:54 -0700, Mike Turquette wrote:
> Quoting Scott Wood (2014-09-25 13:08:00)
> > Well, like I said, I'd rather see the CLK_OF_DECLARE stuff be made to
> > work on PPC rather than have the driver carry around two binding
> > methods.
> 
> I guess that is an existing problem, and not related directly to this
> patch? This patch is essentially just renames (though the V1.0/V2.0
> stuff seems weird).

This patch is adding CLK_OF_DECLARE.

-Scott

Re: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Mike Turquette]

Quoting Scott Wood (2014-09-25 15:56:20)
> On Thu, 2014-09-25 at 15:54 -0700, Mike Turquette wrote:
> > Quoting Scott Wood (2014-09-25 13:08:00)
> > > Well, like I said, I'd rather see the CLK_OF_DECLARE stuff be made to
> > > work on PPC rather than have the driver carry around two binding
> > > methods.
> > =

> > I guess that is an existing problem, and not related directly to this
> > patch? This patch is essentially just renames (though the V1.0/V2.0
> > stuff seems weird).
> =

> This patch is adding CLK_OF_DECLARE.

I'm fine taking this patch but your comments are still unresolved. What
do you think needs to be done to fix the problems that you see?

Regards,
Mike

> =

> -Scott
> =

>=20

RE: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Yuantian Tang]

PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBMaW51eHBwYy1kZXYNCj4gW21h
aWx0bzpsaW51eHBwYy1kZXYtYm91bmNlcytiMjk5ODM9ZnJlZXNjYWxlLmNvbUBsaXN0cy5vemxh
YnMub3JnXSBPbg0KPiBCZWhhbGYgT2YgTWlrZSBUdXJxdWV0dGUNCj4gU2VudDogU2F0dXJkYXks
IFNlcHRlbWJlciAyNywgMjAxNCA3OjI5IEFNDQo+IFRvOiBXb29kIFNjb3R0LUIwNzQyMQ0KPiBD
YzogbGludXhwcGMtZGV2QGxpc3RzLm96bGFicy5vcmc7IGxpbnV4LWtlcm5lbEB2Z2VyLmtlcm5l
bC5vcmc7DQo+IGxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZzsgTHUgSmluZ2No
YW5nLUIzNTA4Mw0KPiBTdWJqZWN0OiBSZTogW1BBVENIdjRdIGNsazogcHBjLWNvcmVuZXQ6IHJl
bmFtZSB0byBwcGMtcW9yaXEgYW5kIGFkZA0KPiBDTEtfT0ZfREVDTEFSRSBzdXBwb3J0DQo+IA0K
PiBRdW90aW5nIFNjb3R0IFdvb2QgKDIwMTQtMDktMjUgMTU6NTY6MjApDQo+ID4gT24gVGh1LCAy
MDE0LTA5LTI1IGF0IDE1OjU0IC0wNzAwLCBNaWtlIFR1cnF1ZXR0ZSB3cm90ZToNCj4gPiA+IFF1
b3RpbmcgU2NvdHQgV29vZCAoMjAxNC0wOS0yNSAxMzowODowMCkNCj4gPiA+ID4gV2VsbCwgbGlr
ZSBJIHNhaWQsIEknZCByYXRoZXIgc2VlIHRoZSBDTEtfT0ZfREVDTEFSRSBzdHVmZiBiZSBtYWRl
DQo+ID4gPiA+IHRvIHdvcmsgb24gUFBDIHJhdGhlciB0aGFuIGhhdmUgdGhlIGRyaXZlciBjYXJy
eSBhcm91bmQgdHdvDQo+ID4gPiA+IGJpbmRpbmcgbWV0aG9kcy4NCj4gPiA+DQo+ID4gPiBJIGd1
ZXNzIHRoYXQgaXMgYW4gZXhpc3RpbmcgcHJvYmxlbSwgYW5kIG5vdCByZWxhdGVkIGRpcmVjdGx5
IHRvDQo+ID4gPiB0aGlzIHBhdGNoPyBUaGlzIHBhdGNoIGlzIGVzc2VudGlhbGx5IGp1c3QgcmVu
YW1lcyAodGhvdWdoIHRoZQ0KPiA+ID4gVjEuMC9WMi4wIHN0dWZmIHNlZW1zIHdlaXJkKS4NCj4g
Pg0KPiA+IFRoaXMgcGF0Y2ggaXMgYWRkaW5nIENMS19PRl9ERUNMQVJFLg0KPiANCj4gSSdtIGZp
bmUgdGFraW5nIHRoaXMgcGF0Y2ggYnV0IHlvdXIgY29tbWVudHMgYXJlIHN0aWxsIHVucmVzb2x2
ZWQuIFdoYXQgZG8geW91DQo+IHRoaW5rIG5lZWRzIHRvIGJlIGRvbmUgdG8gZml4IHRoZSBwcm9i
bGVtcyB0aGF0IHlvdSBzZWU/DQo+IA0KQ0xLX09GX0RFQ0xBUkUgaXMgdG90YWxseSB3b3JrZWQg
b24gUFBDLiBJIHdpbGwgZG8gaXQgaW4gYSBzZXBhcmF0ZSBwYXRjaC4NClJlZ2FyZGluZyBWMS4w
IGFuZCBWMi4wLCBpdCBpcyBub3Qgd2lyZWQganVzdCBzYW1lIGZvciBub3cuIEJ1dCB3ZSBhcmUg
bm90IHN1cmUgaWYgaXQgaXMgc2FtZSBmb3IgdjMuMCBpbiB0aGUgZnV0dXJlLg0KDQpCZXNpZGVz
IHVwZGF0aW5nIGRyaXZlcnMvY3B1ZnJlcS9LY29uZmlnLnBvd2VycGMsIHRoZXJlIGlzIG9uZSBt
b3JlIHRoaW5nIEkgYW0gbm90IGNvbWZvcnRhYmxlIHdpdGg6DQpUaGlzIHBhdGNoIHVzZXMgIiBm
aXhlZC1jbG9jayIgYXMgc3lzY2xrJ3MgY29tcGF0aWJsZSBzdHJpbmcsIHdoaWxlIG9uIFBQQyB3
ZSB0cmVhdGVkIGl0IGFzICIgZnNsLHFvcmlxLXN5c2Nsay1bMS0yXS4wIi4NClRoYXQncyBpbmNv
bnNpc3RlbnQgb24gYm90aCBBUk0gYW5kIFBQQyBwbGF0Zm9ybXMsIG5laXRoZXIgZGlkIG9uIGJp
bmRpbmdzLg0KDQpUaGFua3MsDQpZdWFudGlhbg0KDQo+IFJlZ2FyZHMsDQo+IE1pa2UNCj4gDQo+
ID4NCj4gPiAtU2NvdHQNCj4gPg0KPiA+DQo+IF9fX19fX19fX19fX19fX19fX19fX19fX19fX19f
X19fX19fX19fX19fX19fX19fDQo+IExpbnV4cHBjLWRldiBtYWlsaW5nIGxpc3QNCj4gTGludXhw
cGMtZGV2QGxpc3RzLm96bGFicy5vcmcNCj4gaHR0cHM6Ly9saXN0cy5vemxhYnMub3JnL2xpc3Rp
bmZvL2xpbnV4cHBjLWRldg0K

RE: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Jingchang Lu]

Pi0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+RnJvbTogVHVkb3IgTGF1cmVudGl1LUIxMDcx
Ng0KPlNlbnQ6IFRodXJzZGF5LCBTZXB0ZW1iZXIgMjUsIDIwMTQgODo1NiBQTQ0KPlRvOiBMdSBK
aW5nY2hhbmctQjM1MDgzOyBtdHVycXVldHRlQGxpbmFyby5vcmcNCj5DYzogV29vZCBTY290dC1C
MDc0MjE7IGxpbnV4cHBjLWRldkBsaXN0cy5vemxhYnMub3JnOyBsaW51eC0NCj5rZXJuZWxAdmdl
ci5rZXJuZWwub3JnOyBsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcNCj5TdWJq
ZWN0OiBSZTogW1BBVENIdjRdIGNsazogcHBjLWNvcmVuZXQ6IHJlbmFtZSB0byBwcGMtcW9yaXEg
YW5kIGFkZA0KPkNMS19PRl9ERUNMQVJFIHN1cHBvcnQNCj4NCj5IaSBKaW5nY2hhbmcsDQo+DQo+
T24gMDkvMjMvMjAxNCAwOTo0NiBBTSwgSmluZ2NoYW5nIEx1IHdyb3RlOg0KPj4gVGhlIElQIGlz
IHNoYXJlZCBieSBQUEMgYW5kIEFSTSwgdGhpcyByZW5hbWVzIGl0IHRvIHFvcmlxIGZvciBiZXR0
ZXINCj4+IHJlcHJlc2VudGlvbiwgYW5kIHRoaXMgYWxzbyBhZGRzIHRoZSBDTEtfT0ZfREVDTEFS
RSBzdXBwb3J0IGZvciBiZWluZw0KPj4gaW5pdGlhbGl6ZWQgYnkgb2ZfY2xrX2luaXQoKSBvbiBB
Uk0uDQo+Pg0KPg0KPkkgdGhpbmsgeW91IG5lZWQgdG8gYWxzbyB1cGRhdGUgZHJpdmVycy9jcHVm
cmVxL0tjb25maWcucG93ZXJwYyB0byB1c2UgdGhlDQo+cmVuYW1lZCBjb25maWcgb3B0aW9uLg0K
Pg0KDQpUaGFua3MsIEkgd2lsbCB1cGRhdGUgdGhhdCBzZWxlY3RlZCBjb25maWcgb3B0aW9uIG9m
IENMS19QUENfQ09SRU5FVC4NCg0KQmVzdCBSZWdhcmRzLA0KSmluZ2NoYW5nDQo+LS0tDQo+QmVz
dCBSZWdhcmRzLCBMYXVyZW50aXUNCg0KDQo=

Re: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Scott Wood]

On Sat, 2014-09-27 at 21:18 -0500, Tang Yuantian-B29983 wrote:
> > -----Original Message-----
> > From: Linuxppc-dev
> > [mailto:linuxppc-dev-bounces+b29983=freescale.com@lists.ozlabs.org] On
> > Behalf Of Mike Turquette
> > Sent: Saturday, September 27, 2014 7:29 AM
> > To: Wood Scott-B07421
> > Cc: linuxppc-dev@lists.ozlabs.org; linux-kernel@vger.kernel.org;
> > linux-arm-kernel@lists.infradead.org; Lu Jingchang-B35083
> > Subject: Re: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add
> > CLK_OF_DECLARE support
> > 
> > Quoting Scott Wood (2014-09-25 15:56:20)
> > > On Thu, 2014-09-25 at 15:54 -0700, Mike Turquette wrote:
> > > > Quoting Scott Wood (2014-09-25 13:08:00)
> > > > > Well, like I said, I'd rather see the CLK_OF_DECLARE stuff be made
> > > > > to work on PPC rather than have the driver carry around two
> > > > > binding methods.
> > > >
> > > > I guess that is an existing problem, and not related directly to
> > > > this patch? This patch is essentially just renames (though the
> > > > V1.0/V2.0 stuff seems weird).
> > >
> > > This patch is adding CLK_OF_DECLARE.
> > 
> > I'm fine taking this patch but your comments are still unresolved. What do you
> > think needs to be done to fix the problems that you see?
> > 
> CLK_OF_DECLARE is totally worked on PPC. I will do it in a separate patch.
> Regarding V1.0 and V2.0, it is not wired just same for now. But we are not sure if it is same for v3.0 in the future.
> 
> Besides updating drivers/cpufreq/Kconfig.powerpc, there is one more thing I am not comfortable with:
> This patch uses " fixed-clock" as sysclk's compatible string, while on PPC we treated it as " fsl,qoriq-sysclk-[1-2].0".
> That's inconsistent on both ARM and PPC platforms, neither did on bindings.

fsl,qoriq-sysclk-XXX is the way it is because of compatibility with the
fixups in existing U-Boots.  It shouldn't be used as a model.

That said, I don't think you really mean "this patch", as it doesn't
contain the device tree updates, and "fixed-clock" does not appear.

-Scott

RE: [PATCHv4] clk: ppc-corenet: rename to ppc-qoriq and add CLK_OF_DECLARE support

[Yuantian Tang]

PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBXb29kIFNjb3R0LUIwNzQyMQ0K
PiBTZW50OiBUdWVzZGF5LCBTZXB0ZW1iZXIgMzAsIDIwMTQgNzo1OCBBTQ0KPiBUbzogVGFuZyBZ
dWFudGlhbi1CMjk5ODMNCj4gQ2M6IE1pa2UgVHVycXVldHRlOyBsaW51eHBwYy1kZXZAbGlzdHMu
b3psYWJzLm9yZzsgbGludXgta2VybmVsQHZnZXIua2VybmVsLm9yZzsNCj4gbGludXgtYXJtLWtl
cm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnOyBMdSBKaW5nY2hhbmctQjM1MDgzDQo+IFN1YmplY3Q6
IFJlOiBbUEFUQ0h2NF0gY2xrOiBwcGMtY29yZW5ldDogcmVuYW1lIHRvIHBwYy1xb3JpcSBhbmQg
YWRkDQo+IENMS19PRl9ERUNMQVJFIHN1cHBvcnQNCj4gDQo+IE9uIFNhdCwgMjAxNC0wOS0yNyBh
dCAyMToxOCAtMDUwMCwgVGFuZyBZdWFudGlhbi1CMjk5ODMgd3JvdGU6DQo+ID4gPiAtLS0tLU9y
aWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiA+ID4gRnJvbTogTGludXhwcGMtZGV2DQo+ID4gPiBbbWFp
bHRvOmxpbnV4cHBjLWRldi1ib3VuY2VzK2IyOTk4Mz1mcmVlc2NhbGUuY29tQGxpc3RzLm96bGFi
cy5vcmddDQo+ID4gPiBPbiBCZWhhbGYgT2YgTWlrZSBUdXJxdWV0dGUNCj4gPiA+IFNlbnQ6IFNh
dHVyZGF5LCBTZXB0ZW1iZXIgMjcsIDIwMTQgNzoyOSBBTQ0KPiA+ID4gVG86IFdvb2QgU2NvdHQt
QjA3NDIxDQo+ID4gPiBDYzogbGludXhwcGMtZGV2QGxpc3RzLm96bGFicy5vcmc7IGxpbnV4LWtl
cm5lbEB2Z2VyLmtlcm5lbC5vcmc7DQo+ID4gPiBsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJh
ZGVhZC5vcmc7IEx1IEppbmdjaGFuZy1CMzUwODMNCj4gPiA+IFN1YmplY3Q6IFJlOiBbUEFUQ0h2
NF0gY2xrOiBwcGMtY29yZW5ldDogcmVuYW1lIHRvIHBwYy1xb3JpcSBhbmQgYWRkDQo+ID4gPiBD
TEtfT0ZfREVDTEFSRSBzdXBwb3J0DQo+ID4gPg0KPiA+ID4gUXVvdGluZyBTY290dCBXb29kICgy
MDE0LTA5LTI1IDE1OjU2OjIwKQ0KPiA+ID4gPiBPbiBUaHUsIDIwMTQtMDktMjUgYXQgMTU6NTQg
LTA3MDAsIE1pa2UgVHVycXVldHRlIHdyb3RlOg0KPiA+ID4gPiA+IFF1b3RpbmcgU2NvdHQgV29v
ZCAoMjAxNC0wOS0yNSAxMzowODowMCkNCj4gPiA+ID4gPiA+IFdlbGwsIGxpa2UgSSBzYWlkLCBJ
J2QgcmF0aGVyIHNlZSB0aGUgQ0xLX09GX0RFQ0xBUkUgc3R1ZmYgYmUNCj4gPiA+ID4gPiA+IG1h
ZGUgdG8gd29yayBvbiBQUEMgcmF0aGVyIHRoYW4gaGF2ZSB0aGUgZHJpdmVyIGNhcnJ5IGFyb3Vu
ZA0KPiA+ID4gPiA+ID4gdHdvIGJpbmRpbmcgbWV0aG9kcy4NCj4gPiA+ID4gPg0KPiA+ID4gPiA+
IEkgZ3Vlc3MgdGhhdCBpcyBhbiBleGlzdGluZyBwcm9ibGVtLCBhbmQgbm90IHJlbGF0ZWQgZGly
ZWN0bHkgdG8NCj4gPiA+ID4gPiB0aGlzIHBhdGNoPyBUaGlzIHBhdGNoIGlzIGVzc2VudGlhbGx5
IGp1c3QgcmVuYW1lcyAodGhvdWdoIHRoZQ0KPiA+ID4gPiA+IFYxLjAvVjIuMCBzdHVmZiBzZWVt
cyB3ZWlyZCkuDQo+ID4gPiA+DQo+ID4gPiA+IFRoaXMgcGF0Y2ggaXMgYWRkaW5nIENMS19PRl9E
RUNMQVJFLg0KPiA+ID4NCj4gPiA+IEknbSBmaW5lIHRha2luZyB0aGlzIHBhdGNoIGJ1dCB5b3Vy
IGNvbW1lbnRzIGFyZSBzdGlsbCB1bnJlc29sdmVkLg0KPiA+ID4gV2hhdCBkbyB5b3UgdGhpbmsg
bmVlZHMgdG8gYmUgZG9uZSB0byBmaXggdGhlIHByb2JsZW1zIHRoYXQgeW91IHNlZT8NCj4gPiA+
DQo+ID4gQ0xLX09GX0RFQ0xBUkUgaXMgdG90YWxseSB3b3JrZWQgb24gUFBDLiBJIHdpbGwgZG8g
aXQgaW4gYSBzZXBhcmF0ZSBwYXRjaC4NCj4gPiBSZWdhcmRpbmcgVjEuMCBhbmQgVjIuMCwgaXQg
aXMgbm90IHdpcmVkIGp1c3Qgc2FtZSBmb3Igbm93LiBCdXQgd2UgYXJlIG5vdCBzdXJlDQo+IGlm
IGl0IGlzIHNhbWUgZm9yIHYzLjAgaW4gdGhlIGZ1dHVyZS4NCj4gPg0KPiA+IEJlc2lkZXMgdXBk
YXRpbmcgZHJpdmVycy9jcHVmcmVxL0tjb25maWcucG93ZXJwYywgdGhlcmUgaXMgb25lIG1vcmUg
dGhpbmcgSQ0KPiBhbSBub3QgY29tZm9ydGFibGUgd2l0aDoNCj4gPiBUaGlzIHBhdGNoIHVzZXMg
IiBmaXhlZC1jbG9jayIgYXMgc3lzY2xrJ3MgY29tcGF0aWJsZSBzdHJpbmcsIHdoaWxlIG9uIFBQ
QyB3ZQ0KPiB0cmVhdGVkIGl0IGFzICIgZnNsLHFvcmlxLXN5c2Nsay1bMS0yXS4wIi4NCj4gPiBU
aGF0J3MgaW5jb25zaXN0ZW50IG9uIGJvdGggQVJNIGFuZCBQUEMgcGxhdGZvcm1zLCBuZWl0aGVy
IGRpZCBvbiBiaW5kaW5ncy4NCj4gDQo+IGZzbCxxb3JpcS1zeXNjbGstWFhYIGlzIHRoZSB3YXkg
aXQgaXMgYmVjYXVzZSBvZiBjb21wYXRpYmlsaXR5IHdpdGggdGhlIGZpeHVwcyBpbg0KPiBleGlz
dGluZyBVLUJvb3RzLiAgSXQgc2hvdWxkbid0IGJlIHVzZWQgYXMgYSBtb2RlbC4NCj4gDQo+IFRo
YXQgc2FpZCwgSSBkb24ndCB0aGluayB5b3UgcmVhbGx5IG1lYW4gInRoaXMgcGF0Y2giLCBhcyBp
dCBkb2Vzbid0IGNvbnRhaW4gdGhlDQo+IGRldmljZSB0cmVlIHVwZGF0ZXMsIGFuZCAiZml4ZWQt
Y2xvY2siIGRvZXMgbm90IGFwcGVhci4NCj4gDQoiZml4ZWQtY2xvY2siIHdpbGwgYXBwZWFyIHdo
ZW4gbHMxMDJ4IHBsYXRmb3JtIERUUyBnZXRzIHVwc3RyZWFtZWQgZXZlbnR1YWxseS4NClRoYXQg
d291bGQgYmUgZmluZSBpZiB5b3UgZG9uJ3QgdGhpbmsgImZzbCxxb3JpcS1zeXNjbGsteHh4IiBo
YXZpbmcgZGlmZmVyZW50IG1lYW5pbmcgb24gQVJNIGFuZCBQb3dlclBDIGlzIGEgaXNzdWUuDQoN
ClRoYW5rcywNCll1YW50aWFuDQo+IC1TY290dA0KPiANCg0K