From: Bjorn Helgaas <bhelgaas@google.com>
To: Wei Yang <weiyang@linux.vnet.ibm.com>
Cc: linux-pci@vger.kernel.org, benh@au1.ibm.com,
linuxppc-dev@lists.ozlabs.org, gwshan@linux.vnet.ibm.com
Subject: Re: [PATCH V13 15/21] powerpc/powernv: Reserve additional space for IOV BAR according to the number of total_pe
Date: Thu, 19 Mar 2015 10:08:24 -0500 [thread overview]
Message-ID: <20150319150824.GE26935@google.com> (raw)
In-Reply-To: <20150312011517.GA5833@richard>
On Thu, Mar 12, 2015 at 09:15:17AM +0800, Wei Yang wrote:
> On Wed, Mar 11, 2015 at 08:55:07AM -0500, Bjorn Helgaas wrote:
> >On Wed, Mar 04, 2015 at 01:19:07PM +0800, Wei Yang wrote:
> >> On PHB3, PF IOV BAR will be covered by M64 window to have better PE
> >> isolation. The total_pe number is usually different from total_VFs, which
> >> can lead to a conflict between MMIO space and the PE number.
> >>
> >> For example, if total_VFs is 128 and total_pe is 256, the second half of
> >> M64 window will be part of other PCI device, which may already belong
> >> to other PEs.
> >>
> >> Prevent the conflict by reserving additional space for the PF IOV BAR,
> >> which is total_pe number of VF's BAR size.
> >>
> >> [bhelgaas: make dev_printk() output more consistent, index resource[]
> >> conventionally]
> >> Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
> >> ---
> >> arch/powerpc/include/asm/machdep.h | 4 ++
> >> arch/powerpc/include/asm/pci-bridge.h | 3 ++
> >> arch/powerpc/kernel/pci-common.c | 5 +++
> >> arch/powerpc/kernel/pci-hotplug.c | 4 ++
> >> arch/powerpc/platforms/powernv/pci-ioda.c | 61 +++++++++++++++++++++++++++++
> >> 5 files changed, 77 insertions(+)
> >>
> >> diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
> >> index c8175a3..965547c 100644
> >> --- a/arch/powerpc/include/asm/machdep.h
> >> +++ b/arch/powerpc/include/asm/machdep.h
> >> @@ -250,6 +250,10 @@ struct machdep_calls {
> >> /* Reset the secondary bus of bridge */
> >> void (*pcibios_reset_secondary_bus)(struct pci_dev *dev);
> >>
> >> +#ifdef CONFIG_PCI_IOV
> >> + void (*pcibios_fixup_sriov)(struct pci_bus *bus);
> >> +#endif /* CONFIG_PCI_IOV */
> >> +
> >> /* Called to shutdown machine specific hardware not already controlled
> >> * by other drivers.
> >> */
> >> diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
> >> index 513f8f2..de11de7 100644
> >> --- a/arch/powerpc/include/asm/pci-bridge.h
> >> +++ b/arch/powerpc/include/asm/pci-bridge.h
> >> @@ -175,6 +175,9 @@ struct pci_dn {
> >> #define IODA_INVALID_PE (-1)
> >> #ifdef CONFIG_PPC_POWERNV
> >> int pe_number;
> >> +#ifdef CONFIG_PCI_IOV
> >> + u16 max_vfs; /* number of VFs IOV BAR expended */
> >> +#endif /* CONFIG_PCI_IOV */
> >> #endif
> >> struct list_head child_list;
> >> struct list_head list;
> >> diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
> >> index 8203101..022e9fe 100644
> >> --- a/arch/powerpc/kernel/pci-common.c
> >> +++ b/arch/powerpc/kernel/pci-common.c
> >> @@ -1646,6 +1646,11 @@ void pcibios_scan_phb(struct pci_controller *hose)
> >> if (ppc_md.pcibios_fixup_phb)
> >> ppc_md.pcibios_fixup_phb(hose);
> >>
> >> +#ifdef CONFIG_PCI_IOV
> >> + if (ppc_md.pcibios_fixup_sriov)
> >> + ppc_md.pcibios_fixup_sriov(bus);
> >> +#endif /* CONFIG_PCI_IOV */
> >
> >Here, and ...
> >
> >> +
> >> /* Configure PCI Express settings */
> >> if (bus && !pci_has_flag(PCI_PROBE_ONLY)) {
> >> struct pci_bus *child;
> >> diff --git a/arch/powerpc/kernel/pci-hotplug.c b/arch/powerpc/kernel/pci-hotplug.c
> >> index 5b78917..7d238ae 100644
> >> --- a/arch/powerpc/kernel/pci-hotplug.c
> >> +++ b/arch/powerpc/kernel/pci-hotplug.c
> >> @@ -94,6 +94,10 @@ void pcibios_add_pci_devices(struct pci_bus * bus)
> >> */
> >> slotno = PCI_SLOT(PCI_DN(dn->child)->devfn);
> >> pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
> >> +#ifdef CONFIG_PCI_IOV
> >> + if (ppc_md.pcibios_fixup_sriov)
> >> + ppc_md.pcibios_fixup_sriov(bus);
> >> +#endif /* CONFIG_PCI_IOV */
> >
> >here, you have the same code. It's good that we now do it for hot-added
> >devices as well as those present at boot. But it's bad that it happens in
> >two different paths.
> >
> >Isn't there some way we can unify this so the same path is used for the
> >initial pcibios_scan_phb() and also the hot-add case? Maybe call
> >pcibios_fixup_sriov() from pcibios_add_device()?
> >
>
>
> This is a very good suggestion. I have changed this and works fine.
I was expecting a v14 series with this change. Is it coming, or are you
waiting for something else from me?
next prev parent reply other threads:[~2015-03-19 15:08 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-04 5:18 [PATCH V13 00/21] Enable SRIOV on Power8 Wei Yang
2015-03-04 5:18 ` [PATCH V13 01/21] PCI: Print more info in sriov_enable() error message Wei Yang
2015-03-04 5:18 ` [PATCH V13 02/21] PCI: Print PF SR-IOV resource that contains all VF(n) BAR space Wei Yang
2015-03-04 5:18 ` [PATCH V13 03/21] PCI: Keep individual VF BAR size in struct pci_sriov Wei Yang
2015-03-04 5:18 ` [PATCH V13 04/21] PCI: Index IOV resources in the conventional style Wei Yang
2015-03-04 5:18 ` [PATCH V13 05/21] PCI: Refresh First VF Offset and VF Stride when updating NumVFs Wei Yang
2015-03-04 5:18 ` [PATCH V13 06/21] PCI: Calculate maximum number of buses required for VFs Wei Yang
2015-03-04 5:18 ` [PATCH V13 07/21] PCI: Export pci_iov_virtfn_bus() and pci_iov_virtfn_devfn() Wei Yang
2015-03-04 5:19 ` [PATCH V13 08/21] PCI: Add pcibios_sriov_enable() and pcibios_sriov_disable() Wei Yang
2015-03-04 5:19 ` [PATCH V13 09/21] PCI: Add pcibios_iov_resource_alignment() interface Wei Yang
2015-03-04 5:19 ` [PATCH V13 10/21] PCI: Consider additional PF's IOV BAR alignment in sizing and assigning Wei Yang
2015-03-04 5:19 ` [PATCH V13 11/21] powerpc/pci: Don't unset PCI resources for VFs Wei Yang
2015-03-04 5:19 ` [PATCH V13 12/21] powerpc/pci: Refactor pci_dn Wei Yang
2015-03-04 5:19 ` [PATCH V13 13/21] powerpc/powernv: Use pci_dn, not device_node, in PCI config accessor Wei Yang
2015-03-04 5:19 ` [PATCH V13 14/21] powerpc/powernv: Allocate struct pnv_ioda_pe iommu_table dynamically Wei Yang
2015-03-04 5:19 ` [PATCH V13 15/21] powerpc/powernv: Reserve additional space for IOV BAR according to the number of total_pe Wei Yang
2015-03-11 13:55 ` Bjorn Helgaas
2015-03-12 1:15 ` Wei Yang
2015-03-19 15:08 ` Bjorn Helgaas [this message]
2015-03-19 16:18 ` Wei Yang
2015-03-19 17:54 ` Bjorn Helgaas
2015-03-19 23:49 ` Wei Yang
2015-03-04 5:19 ` [PATCH V13 16/21] powerpc/powernv: Implement pcibios_iov_resource_alignment() on powernv Wei Yang
2015-03-04 5:19 ` [PATCH V13 17/21] powerpc/powernv: Shift VF resource with an offset Wei Yang
2015-03-04 5:19 ` [PATCH V13 18/21] powerpc/powernv: Reserve additional space for IOV BAR, with m64_per_iov supported Wei Yang
2015-03-04 5:19 ` [PATCH V13 19/21] powerpc/powernv: Group VF PE when IOV BAR is big on PHB3 Wei Yang
2015-03-04 5:19 ` [PATCH V13 20/21] powerpc/pci: Remove unused struct pci_dn.pcidev field Wei Yang
2015-03-04 5:19 ` [PATCH V13 21/21] powerpc/pci: Add PCI resource alignment documentation Wei Yang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150319150824.GE26935@google.com \
--to=bhelgaas@google.com \
--cc=benh@au1.ibm.com \
--cc=gwshan@linux.vnet.ibm.com \
--cc=linux-pci@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=weiyang@linux.vnet.ibm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).