From: Segher Boessenkool <segher@kernel.crashing.org>
To: Christophe Leroy <christophe.leroy@c-s.fr>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
scottwood@freescale.com, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 02/20] powerpc/8xx: Map linear kernel RAM with 8M pages
Date: Thu, 13 Aug 2015 02:00:43 -0500 [thread overview]
Message-ID: <20150813070043.GA29938@gate.crashing.org> (raw)
In-Reply-To: <f4a53e003d35f37d7825b88d7f07ae88a918ed3c.1439382634.git.christophe.leroy@c-s.fr>
On Wed, Aug 12, 2015 at 03:40:56PM +0200, Christophe Leroy wrote:
> /* Insert level 1 index */
> rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
> lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
> + mtcr r11
Maybe mtcrf is faster? You only want one field, anyhow.
> + bgt- cr7,5f /* CR7.GT = bit 29 = Large page (8M or 512K) */
You can write this as bt- 29,5f which should be easier to read.
> /* Insert level 1 index */
> 3: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
> lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
> + mtcr r11
> + bgt cr7,200f
Same here... Probably good to comment it, too.
Segher
next prev parent reply other threads:[~2015-08-13 7:01 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-12 13:40 [PATCH 00/20] powerpc/8xx: Use large pages for RAM and IMMR and other improvments Christophe Leroy
2015-08-12 13:40 ` [PATCH 01/20] powerpc/8xx: Save r3 all the time in DTLB miss handler Christophe Leroy
2015-08-12 13:40 ` [PATCH 02/20] powerpc/8xx: Map linear kernel RAM with 8M pages Christophe Leroy
2015-08-13 7:00 ` Segher Boessenkool [this message]
2015-08-12 13:40 ` [PATCH 03/20] powerpc: Update documentation for noltlbs kernel parameter Christophe Leroy
2015-08-12 13:41 ` [PATCH 04/20] powerpc/8xx: move setup_initial_memory_limit() into 8xx_mmu.c Christophe Leroy
2015-08-12 13:41 ` [PATCH 05/20] powerpc/8xx: Fix vaddr for IMMR early remap Christophe Leroy
2015-08-12 13:41 ` [PATCH 06/20] powerpc32: iounmap() cannot vunmap() area mapped by TLBCAMs either Christophe Leroy
2015-08-12 13:41 ` [PATCH 07/20] powerpc32: refactor x_mapped_by_bats() and x_mapped_by_tlbcam() together Christophe Leroy
2015-08-12 13:41 ` [PATCH 08/20] powerpc/8xx: Map IMMR area with 512k page at a fixed address Christophe Leroy
2015-08-12 13:41 ` [PATCH 09/20] powerpc/8xx: show IMMR area in startup memory layout Christophe Leroy
2015-08-12 13:41 ` [PATCH 10/20] powerpc/8xx: CONFIG_PIN_TLB unneeded for CONFIG_PPC_EARLY_DEBUG_CPM Christophe Leroy
2015-08-12 13:41 ` [PATCH 11/20] powerpc/8xx: map 16M RAM at startup Christophe Leroy
2015-08-12 13:41 ` [PATCH 12/20] powerpc/8xx: move 8xx SPRN defines into reg_8xx.h and add some missing ones Christophe Leroy
2015-08-12 13:41 ` [PATCH 13/20] powerpc/8xx: Handle CPU6 ERRATA directly in mtspr() macro Christophe Leroy
2015-08-12 13:41 ` [PATCH 14/20] powerpc/8xx: remove special handling of CPU6 errata in set_dec() Christophe Leroy
2015-08-12 13:41 ` [PATCH 15/20] powerpc/8xx: rewrite set_context() in C Christophe Leroy
2015-08-12 13:41 ` [PATCH 16/20] powerpc/8xx: rewrite flush_instruction_cache() " Christophe Leroy
2015-08-12 13:41 ` [PATCH 17/20] powerpc32: Remove clear_pages() Christophe Leroy
2015-08-12 13:41 ` [PATCH 18/20] powerpc32: Remove useless/wrong MMU:setio progress message Christophe Leroy
2015-08-12 13:41 ` [PATCH 19/20] powerpc/8xx: also use r3 in the ITLB miss in all situations Christophe Leroy
2015-08-12 13:41 ` [PATCH 20/20] powerpc32: remove ioremap_base Christophe Leroy
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