From: Michael Ellerman <mpe@ellerman.id.au>
To: Ian Munsie <imunsie@au1.ibm.com>,
Michael Ellerman <michaele@au1.ibm.com>
Cc: Philippe Bergheaud <felix@linux.vnet.ibm.com>,
linuxppc-dev <linuxppc-dev@ozlabs.org>,
Michael Neuling <mikey@neuling.org>
Subject: Re: cxl: Workaround malformed pcie packets on some cards
Date: Wed, 7 Oct 2015 21:10:56 +1100 (AEDT) [thread overview]
Message-ID: <20151007101056.90DB5140D6E@ozlabs.org> (raw)
In-Reply-To: <1443763413-8318-1-git-send-email-imunsie@au.ibm.com>
On Fri, 2015-02-10 at 05:23:33 UTC, Ian Munsie wrote:
> From: Philippe Bergheaud <felix@linux.vnet.ibm.com>
>
> This works around a pcie host bridge defect on some cards, that can cause
> malformed Transaction Layer Packet (TLP) errors to be erroneously reported.
>
> The upper nibble of the vendor section PSL revision is used to distinguish
> between different cards. The affected ones have it set to 0.
>
> Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
> Acked-by: Ian Munsie <imunsie@au1.ibm.com>
Applied to powerpc fixes, thanks.
https://git.kernel.org/powerpc/c/d79e6801b1868ff65f4c956d
cheers
prev parent reply other threads:[~2015-10-07 10:10 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-02 5:23 [PATCH] cxl: Workaround malformed pcie packets on some cards Ian Munsie
2015-10-07 10:10 ` Michael Ellerman [this message]
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