From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (ozlabs.org [103.22.144.67]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 72A8E1A08EB for ; Tue, 13 Oct 2015 11:14:51 +1100 (AEDT) Received: from e23smtp03.au.ibm.com (e23smtp03.au.ibm.com [202.81.31.145]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 23A42140DA8 for ; Tue, 13 Oct 2015 11:14:51 +1100 (AEDT) Received: from /spool/local by e23smtp03.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 13 Oct 2015 10:14:49 +1000 Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp01.au.ibm.com (Postfix) with ESMTP id AD4722CE8050 for ; Tue, 13 Oct 2015 11:14:47 +1100 (EST) Received: from d23av01.au.ibm.com (d23av01.au.ibm.com [9.190.234.96]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t9D0ERcS65601638 for ; Tue, 13 Oct 2015 11:14:35 +1100 Received: from d23av01.au.ibm.com (localhost [127.0.0.1]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t9D0EE2h021350 for ; Tue, 13 Oct 2015 11:14:15 +1100 Date: Tue, 13 Oct 2015 11:13:50 +1100 From: Gavin Shan To: Wei Yang Cc: gwshan@linux.vnet.ibm.com, aik@ozlabs.ru, benh@kernel.crashing.org, linuxppc-dev@ozlabs.org, mpe@ellerman.id.au Subject: Re: [PATCH V5 2/6] powerpc/powernv: simplify the calculation of iov resource alignment Message-ID: <20151013001350.GA21778@gwshan> Reply-To: Gavin Shan References: <1444358816-8163-1-git-send-email-weiyang@linux.vnet.ibm.com> <1444358816-8163-3-git-send-email-weiyang@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <1444358816-8163-3-git-send-email-weiyang@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Fri, Oct 09, 2015 at 10:46:52AM +0800, Wei Yang wrote: >The alignment of IOV BAR on PowerNV platform is the total size of the IOV >BAR. No matter whether the IOV BAR is extended with number of >roundup_pow_of_two(total_vfs) or number of max PE number (256), the total >size could be calculated by (vfs_expanded * VF_BAR_size). > >This patch simplifies the pnv_pci_iov_resource_alignment() by removing the >first case. > >Signed-off-by: Wei Yang >Reviewed-by: Gavin Shan >Acked-by: Alexey Kardashevskiy >--- > arch/powerpc/platforms/powernv/pci-ioda.c | 20 ++++++++++++-------- > 1 file changed, 12 insertions(+), 8 deletions(-) > >diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c >index 8c031b5..7da476b 100644 >--- a/arch/powerpc/platforms/powernv/pci-ioda.c >+++ b/arch/powerpc/platforms/powernv/pci-ioda.c >@@ -2988,17 +2988,21 @@ static resource_size_t pnv_pci_iov_resource_alignment(struct pci_dev *pdev, > int resno) > { > struct pci_dn *pdn = pci_get_pdn(pdev); >- resource_size_t align, iov_align; >- >- iov_align = resource_size(&pdev->resource[resno]); >- if (iov_align) >- return iov_align; >+ resource_size_t align; > >+ /* >+ * On PowerNV platform, IOV BAR is mapped by M64 BAR to enable the >+ * SR-IOV. While from hardware perspective, the range mapped by M64 >+ * BAR should be size aligned. >+ * >+ * This function returns the total IOV BAR size if M64 BAR is in >+ * Shared PE mode or just the individual size if not. >+ */ s/the invidial size/VF BAR size > align = pci_iov_resource_size(pdev, resno); >- if (pdn->vfs_expanded) >- return pdn->vfs_expanded * align; >+ if (!pdn->vfs_expanded) >+ return align; > >- return align; >+ return pdn->vfs_expanded * align; There is no difference before/after the changes. why this change is needed? > } > #endif /* CONFIG_PCI_IOV */ > >-- >2.5.0 >