[PATCH] cxl: Set endianess of kernel contexts

[PATCH] cxl: Set endianess of kernel contexts

[Frederic Barrat]

A process element (defined in CAIA) keeps track of the endianess of
contexts through the Little Endian (LE) bit of the State Register. It
is currently set for user contexts, but was somehow forgotten for
kernel contexts, so this patch fixes it.
It could lead to erratic behavior from an AFU when the context is
attached through the kernel API.

Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Suggested-by: Michael Neuling <mikey@neuling.org>
Cc: <stable@vger.kernel.org> # 4.3+
---
cxl kernel API is supported starting with 4.3 (for cxlflash)

 drivers/misc/cxl/native.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index d2e75c8..f409097 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -497,6 +497,7 @@ static u64 calculate_sr(struct cxl_context *ctx)
 {
 	u64 sr = 0;
 
+	set_endian(sr);
 	if (ctx->master)
 		sr |= CXL_PSL_SR_An_MP;
 	if (mfspr(SPRN_LPCR) & LPCR_TC)
@@ -506,7 +507,6 @@ static u64 calculate_sr(struct cxl_context *ctx)
 		sr |= CXL_PSL_SR_An_HV;
 	} else {
 		sr |= CXL_PSL_SR_An_PR | CXL_PSL_SR_An_R;
-		set_endian(sr);
 		sr &= ~(CXL_PSL_SR_An_HV);
 		if (!test_tsk_thread_flag(current, TIF_32BIT))
 			sr |= CXL_PSL_SR_An_SF;
-- 
1.9.1

Re: [PATCH] cxl: Set endianess of kernel contexts

[Michael Neuling]

On Mon, 2015-12-07 at 14:34 +0100, Frederic Barrat wrote:
> A process element (defined in CAIA) keeps track of the endianess of
> contexts through the Little Endian (LE) bit of the State Register. It
> is currently set for user contexts, but was somehow forgotten for
> kernel contexts, so this patch fixes it.
> It could lead to erratic behavior from an AFU when the context is
> attached through the kernel API.
>=20
> Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> Suggested-by: Michael Neuling <mikey@neuling.org>
> Cc: <stable@vger.kernel.org> # 4.3+
> ---
> cxl kernel API is supported starting with 4.3 (for cxlflash)

The cxlflash's AFU doesn't use this bit, so the stable@ marker here is
probably not strictly needed.

Mikey


>  drivers/misc/cxl/native.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
> index d2e75c8..f409097 100644
> --- a/drivers/misc/cxl/native.c
> +++ b/drivers/misc/cxl/native.c
> @@ -497,6 +497,7 @@ static u64 calculate_sr(struct cxl_context *ctx)
>  {
>  	u64 sr =3D 0;
> =20
> +	set_endian(sr);
>  	if (ctx->master)
>  		sr |=3D CXL_PSL_SR_An_MP;
>  	if (mfspr(SPRN_LPCR) & LPCR_TC)
> @@ -506,7 +507,6 @@ static u64 calculate_sr(struct cxl_context *ctx)
>  		sr |=3D CXL_PSL_SR_An_HV;
>  	} else {
>  		sr |=3D CXL_PSL_SR_An_PR | CXL_PSL_SR_An_R;
> -		set_endian(sr);
>  		sr &=3D ~(CXL_PSL_SR_An_HV);
>  		if (!test_tsk_thread_flag(current, TIF_32BIT))
>  			sr |=3D CXL_PSL_SR_An_SF;

Re: [PATCH] cxl: Set endianess of kernel contexts

[Ian Munsie]

Acked-by: Ian Munsie <imunsie@au1.ibm.com>

Re: cxl: Set endianess of kernel contexts

[Michael Ellerman]

On Mon, 2015-07-12 at 13:34:40 UTC, Frederic Barrat wrote:
> A process element (defined in CAIA) keeps track of the endianess of
> contexts through the Little Endian (LE) bit of the State Register. It
> is currently set for user contexts, but was somehow forgotten for
> kernel contexts, so this patch fixes it.
> It could lead to erratic behavior from an AFU when the context is
> attached through the kernel API.
> 
> Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> Suggested-by: Michael Neuling <mikey@neuling.org>
> Cc: <stable@vger.kernel.org> # 4.3+

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/e606e035cc7293a3824527d9

cheers