From: Segher Boessenkool <segher@kernel.crashing.org>
To: Jack Miller <jack@codezen.org>
Cc: linuxppc-dev@lists.ozlabs.org, michael.neuling@au1.ibm.com,
michaele@au1.ibm.com
Subject: Re: [PATCH 2/3] powerpc: Load Monitor Register Support
Date: Tue, 12 Apr 2016 00:40:41 -0500 [thread overview]
Message-ID: <20160412054041.GA21633@gate.crashing.org> (raw)
In-Reply-To: <1460401065-10540-3-git-send-email-jack@codezen.org>
Hi,
On Mon, Apr 11, 2016 at 01:57:44PM -0500, Jack Miller wrote:
> __init_FSCR:
> mfspr r3,SPRN_FSCR
> + andi. r3,r3,(~FSCR_LM)@L
> ori r3,r3,FSCR_TAR|FSCR_DSCR|FSCR_EBB
> mtspr SPRN_FSCR,r3
> blr
This clears the top 48 bits as well. Shouldn't matter currently; but
more robust (and easier to read, if you know the idiom) is
ori r3,r3,FSCR_LM|FSCR_TAR|FSCR_DSCR|FSCR_EBB
xori r3,r3,FSCR_LM
Segher
next prev parent reply other threads:[~2016-04-12 5:40 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-11 18:57 [RFC] P9 ldmx support Jack Miller
2016-04-11 18:57 ` [PATCH 1/3] powerpc: Complete FSCR context switch Jack Miller
2016-04-12 23:42 ` [1/3] " Michael Ellerman
2016-04-13 10:51 ` [PATCH 1/3] " Anton Blanchard
2016-04-13 17:52 ` Jack Miller
2016-04-13 23:49 ` Michael Neuling
2016-04-14 18:39 ` Jack Miller
2016-04-14 23:11 ` Michael Neuling
2016-04-11 18:57 ` [PATCH 2/3] powerpc: Load Monitor Register Support Jack Miller
2016-04-12 5:40 ` Segher Boessenkool [this message]
2016-04-13 17:39 ` Jack Miller
2016-04-11 18:57 ` [PATCH 3/3] powerpc: Load Monitor Register Tests Jack Miller
2016-04-15 10:34 ` Madhavan Srinivasan
2016-04-12 1:05 ` [RFC] P9 ldmx support Michael Neuling
-- strict thread matches above, loose matches on Subject: below --
2016-04-18 19:07 [v2] " Jack Miller
2016-04-18 19:08 ` [PATCH 2/3] powerpc: Load Monitor Register Support Jack Miller
2016-04-18 20:47 ` kbuild test robot
2016-04-18 21:08 ` [v3] P9 ldmx support Jack Miller
2016-04-18 21:08 ` [PATCH 2/3] powerpc: Load Monitor Register Support Jack Miller
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