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Date: Tue, 12 Apr 2016 00:40:41 -0500
From: Segher Boessenkool <segher@kernel.crashing.org>
To: Jack Miller <jack@codezen.org>
Cc: linuxppc-dev@lists.ozlabs.org, michael.neuling@au1.ibm.com,
 michaele@au1.ibm.com
Subject: Re: [PATCH 2/3] powerpc: Load Monitor Register Support
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Hi,

On Mon, Apr 11, 2016 at 01:57:44PM -0500, Jack Miller wrote:
>  __init_FSCR:
>  	mfspr	r3,SPRN_FSCR
> +	andi.   r3,r3,(~FSCR_LM)@L
>  	ori	r3,r3,FSCR_TAR|FSCR_DSCR|FSCR_EBB
>  	mtspr	SPRN_FSCR,r3
>  	blr

This clears the top 48 bits as well.  Shouldn't matter currently; but
more robust (and easier to read, if you know the idiom) is

	ori	r3,r3,FSCR_LM|FSCR_TAR|FSCR_DSCR|FSCR_EBB
	xori	r3,r3,FSCR_LM


Segher