From: David Miller <davem@davemloft.net>
To: qiang.zhao@nxp.com
Cc: oss@buserror.net, Joakim.Tjernlund@infinera.com,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, xiaobo.xie@nxp.com
Subject: Re: [Patch v3 5/5] drivers/net: support hdlc function for QE-UCC
Date: Tue, 07 Jun 2016 15:57:08 -0700 (PDT) [thread overview]
Message-ID: <20160607.155708.931158313130335217.davem@davemloft.net> (raw)
In-Reply-To: <1465194602-43209-5-git-send-email-qiang.zhao@nxp.com>
From: Zhao Qiang <qiang.zhao@nxp.com>
Date: Mon, 6 Jun 2016 14:30:02 +0800
> The driver add hdlc support for Freescale QUICC Engine.
> It support NMSI and TSA mode.
>
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Applied.
next prev parent reply other threads:[~2016-06-07 23:04 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-06 6:29 [Patch v3 1/5] fsl/qe: add rx_sync and tx_sync for TDM mode Zhao Qiang
2016-06-06 6:29 ` [Patch v3 2/5] fsl/qe: setup clock source " Zhao Qiang
2016-06-07 22:56 ` David Miller
2016-06-06 6:30 ` [Patch v3 3/5] fsl/qe: Make regs resouce_size_t Zhao Qiang
2016-06-07 22:56 ` David Miller
2016-06-06 6:30 ` [Patch v3 4/5] fsl/qe: Add QE TDM lib Zhao Qiang
2016-06-07 22:57 ` David Miller
2016-06-06 6:30 ` [Patch v3 5/5] drivers/net: support hdlc function for QE-UCC Zhao Qiang
2016-06-07 22:57 ` David Miller [this message]
2016-06-07 22:56 ` [Patch v3 1/5] fsl/qe: add rx_sync and tx_sync for TDM mode David Miller
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