From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rYX9g30p5zDq5c for ; Tue, 21 Jun 2016 12:44:07 +1000 (AEST) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rYX9f4By9z9t0Y for ; Tue, 21 Jun 2016 12:44:06 +1000 (AEST) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u5L2dHTZ040448 for ; Mon, 20 Jun 2016 22:44:04 -0400 Received: from e23smtp03.au.ibm.com (e23smtp03.au.ibm.com [202.81.31.145]) by mx0b-001b2d01.pphosted.com with ESMTP id 23mywwm193-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 20 Jun 2016 22:44:04 -0400 Received: from localhost by e23smtp03.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 21 Jun 2016 12:44:01 +1000 Received: from d23relay10.au.ibm.com (d23relay10.au.ibm.com [9.190.26.77]) by d23dlp03.au.ibm.com (Postfix) with ESMTP id DD2653578052 for ; Tue, 21 Jun 2016 12:43:58 +1000 (EST) Received: from d23av03.au.ibm.com (d23av03.au.ibm.com [9.190.234.97]) by d23relay10.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u5L2hwXr1311032 for ; Tue, 21 Jun 2016 12:43:58 +1000 Received: from d23av03.au.ibm.com (localhost [127.0.0.1]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id u5L2hwum019968 for ; Tue, 21 Jun 2016 12:43:58 +1000 Date: Tue, 21 Jun 2016 12:43:57 +1000 From: Gavin Shan To: Gavin Shan Cc: linuxppc-dev@ozlabs.org, mpe@ellerman.id.au Subject: Re: [PATCH] powerpc/powernv: Exclude MSI region in extended bridge window Reply-To: Gavin Shan References: <1466476865-13425-1-git-send-email-gwshan@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <1466476865-13425-1-git-send-email-gwshan@linux.vnet.ibm.com> Message-Id: <20160621024357.GA13672@gwshan> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Tue, Jun 21, 2016 at 12:41:05PM +1000, Gavin Shan wrote: >The windows of root port and bridge behind that are extended to >the PHB's windows to accomodate the PCI hotplug happening in >future. The PHB's 64KB 32-bits MSI region is included in bridge's >M32 windows (in hardware) though it's excluded in the corresponding >resource, as the bridge's M32 windows have 1MB as their minimal >alignment. We observed EEH error during system boot when the MSI >region is included in bridge's M32 window. > >This excludes top 1MB (including 64KB 32-bits MSI region) region >from bridge's M32 windows when extending them. > >Signed-off-by: Gavin Shan >--- > arch/powerpc/platforms/powernv/pci-ioda.c | 17 ++++++++++++++++- > 1 file changed, 16 insertions(+), 1 deletion(-) > Michael, I saw the PCI hotplug patches have been merged to your "test" branch. This one is the fix for EEH error found on Garrison platform. Please apply it on top of that series. Thanks, Gavin >diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c >index bde7f76..e0a8a92 100644 >--- a/arch/powerpc/platforms/powernv/pci-ioda.c >+++ b/arch/powerpc/platforms/powernv/pci-ioda.c >@@ -3239,6 +3239,7 @@ static void pnv_pci_fixup_bridge_resources(struct pci_bus *bus, > struct pnv_phb *phb = hose->private_data; > struct pci_dev *bridge = bus->self; > struct resource *r, *w; >+ bool msi_region = false; > int i; > > /* Check if we need apply fixup to the bridge's windows */ >@@ -3259,11 +3260,25 @@ static void pnv_pci_fixup_bridge_resources(struct pci_bus *bus, > (type & IORESOURCE_PREFETCH) && > phb->ioda.m64_segsize) > w = &hose->mem_resources[1]; >- else if (r->flags & type & IORESOURCE_MEM) >+ else if (r->flags & type & IORESOURCE_MEM) { > w = &hose->mem_resources[0]; >+ msi_region = true; >+ } > > r->start = w->start; > r->end = w->end; >+ >+ /* The 64KB 32-bits MSI region shouldn't be included in >+ * the 32-bits bridge window. Otherwise, we can see strange >+ * issues. One of them is EEH error observed on Garrison. >+ * >+ * Exclude top 1MB region which is the minimal alignment of >+ * 32-bits bridge window. >+ */ >+ if (msi_region) { >+ r->end += 0x10000; >+ r->end -= 0x100000; >+ } > } > } > >-- >2.1.0 >