From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rqh6F01LszDr0L for ; Thu, 14 Jul 2016 13:30:12 +1000 (AEST) Received: by mail-pf0-x243.google.com with SMTP id i123so4110405pfg.3 for ; Wed, 13 Jul 2016 20:30:12 -0700 (PDT) Date: Thu, 14 Jul 2016 13:30:02 +1000 From: Balbir Singh To: "Aneesh Kumar K.V" Cc: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH for-4.8 02/12] powerpc/mm/radix: Update LPCR HR bit as per ISA Message-ID: <20160714033002.GA18277@balbir.ozlabs.ibm.com> Reply-To: bsingharora@gmail.com References: <1468402531-4914-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> <1468402531-4914-3-git-send-email-aneesh.kumar@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <1468402531-4914-3-git-send-email-aneesh.kumar@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Wed, Jul 13, 2016 at 03:05:21PM +0530, Aneesh Kumar K.V wrote: > PowerISA 3.0 requires the MMU mode (radix vs. hash) of the hypervisor > to be mirrored in the LPCR register, in addition to the partition table. > This is done to avoid fetching from the table when deciding, among other > things, how to perform transitions to HV mode on some interrupts. > So let's set it up appropriately > > Signed-off-by: Aneesh Kumar K.V > --- Acked-by: Balbir Singh